Follow
Ravi Rajwar
Ravi Rajwar
Google
Verified email at cs.wisc.edu - Homepage
Title
Cited by
Cited by
Year
Transactional memory
T Harris, J Larus, R Rajwar
Synthesis Lectures on Computer Architecture 5 (1), 1-263, 2010
6492010
Speculative lock elision: Enabling highly concurrent multithreaded execution
R Rajwar, JR Goodman
Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture …, 2001
6452001
Transactional memory
JR Larus, R Rajwar
Synthesis Lectures on Computer Architecture 1 (1), 1-226, 2007
5962007
Virtualizing transactional memory
R Rajwar, M Herlihy, K Lai
32nd International Symposium on Computer Architecture (ISCA'05), 494-505, 2005
5732005
Transactional lock-free execution of lock-based programs
R Rajwar, JR Goodman
ACM SIGOPS Operating Systems Review 36 (5), 5-17, 2002
4362002
Checkpoint processing and recovery: Towards scalable large instruction window processors
H Akkary, R Rajwar, ST Srinivasan
Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003
3912003
The impact of performance asymmetry in emerging multicore architectures
S Balakrishnan, R Rajwar, M Upton, K Lai
32nd International Symposium on Computer Architecture (ISCA'05), 506-517, 2005
3692005
Performance Evaluation of Intel(R) Transactional Synchronization Extensions for High-Performance Computing
R Yoo, C Hughes, K Lai, R Rajwar
Supercomputing 2013, 2013
3442013
Haswell: The Fourth-Generation Intel Core Processor
P Hammarlund, AJ Martinez, AA Bajwa, DL Hill, E Hallnor, H Jiang, ...
IEEE MICRO 34 (2), 2014
3362014
Continual flow pipelines
ST Srinivasan, R Rajwar, H Akkary, A Gandhi, M Upton
ACM SIGARCH Computer Architecture News 32 (5), 107-119, 2004
2542004
An architectural evaluation of Java TPC-W
HW Cain, R Rajwar, M Marden, MH Lipasti
Proceedings HPCA Seventh International Symposium on High-Performance …, 2001
1872001
Hardware atomicity for reliable software speculation
N Neelakantam, R Rajwar, S Srinivas, U Srinivasan, C Zilles
Proceedings of the 34th Annual International Symposium on Computer …, 2007
922007
Scalable load and store processing in latency tolerant processors
A Gandhi, H Akkary, R Rajwar, ST Srinivasasn, K Lai
32nd International Symposium on Computer Architecture (ISCA'05), 446-457, 2005
862005
Improving In-Memory Database Index Performance with Intel(R) Transactional Synchronization Extensions
T Karnagel, R Dementiev, R Rajwar, K Lai, T Legler, B Schlegel, ...
20th International Symposium on High-Performance Computer Architecture, 2014
702014
Improving the throughput of synchronization by insertion of delays
R Rajwar, A Kagi, JR Goodman
Proceedings Sixth International Symposium on High-Performance Computer …, 2000
562000
Characterizing a Java implementation of TPC-W
T Bezenek, T Cain, R Dickson, T Heil, M Martin, C McCurdy, R Rajwar, ...
Proceedings of the Third Workshop On Computer Architecture Evaluation Using …, 2000
512000
Transactional execution: Toward reliable, high-performance multithreading
R Rajwar, J Goodman
IEEE Micro 23 (6), 117-125, 2003
482003
An analysis of a resource efficient checkpoint architecture
H Akkary, R Rajwar, ST Srinivasan
ACM Transactions on Architecture and Code Optimization (TACO) 1 (4), 418-444, 2004
392004
Intel Transactional Synchronization Extensions
R Rajwar, M Dixon
Intel Developer Forum (IDF) 2012, 2012
372012
Transactional memory and the birthday paradox
C Zilles, R Rajwar
Proceedings of the nineteenth annual ACM symposium on Parallel algorithms …, 2007
342007
The system can't perform the operation now. Try again later.
Articles 1–20