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Joel Hestness
Joel Hestness
Principal Research Scientist, Cerebras Systems
Verified email at cs.wisc.edu - Homepage
Title
Cited by
Cited by
Year
The gem5 simulator
N Binkert, B Beckmann, G Black, SK Reinhardt, A Saidi, A Basu, ...
ACM SIGARCH computer architecture news 39 (2), 1-7, 2011
58562011
Deep learning scaling is predictable, empirically
J Hestness, S Narang, N Ardalani, G Diamos, H Jun, H Kianinejad, ...
arXiv preprint arXiv:1712.00409, 2017
5802017
gem5-gpu: A heterogeneous cpu-gpu simulator
J Power, J Hestness, MS Orr, MD Hill, DA Wood
IEEE Computer Architecture Letters 14 (1), 34-36, 2014
3152014
Kilo-NOC: a heterogeneous network-on-chip architecture for scalability and service guarantees
B Grot, J Hestness, SW Keckler, O Mutlu
ACM SIGARCH computer architecture news 39 (3), 401-412, 2011
2872011
Express cube topologies for on-chip interconnects
B Grot, J Hestness, SW Keckler, O Mutlu
2009 IEEE 15th international symposium on high performance computer …, 2009
2652009
Netrace: dependency-driven trace-based network-on-chip simulation
J Hestness, B Grot, SW Keckler
Proceedings of the Third International Workshop on Network on Chip …, 2010
1712010
Convolutional Recurrent Neural Networks for Small-Footprint Keyword Spotting
SO Arik, M Kliegl, R Child, J Hestness, A Gibiansky, C Fougner, ...
Interspeech 2017, 2017
1622017
Compositional generalization for primitive substitutions
Y Li, L Zhao, J Wang, J Hestness
arXiv preprint arXiv:1910.02612, 2019
922019
Running PARSEC 2.1 on M5
M Gebhart, J Hestness, E Fatehi, P Gratz, SW Keckler
The University of Texas at Austin, Department of Computer Science, Tech. Rep, 2009
922009
Convolutional recurrent neural networks for small-footprint keyword spotting
S Arik, M Kliegl, R Child, J Hestness, A Gibiansky, C Fougner, R Prenger, ...
US Patent 10,540,961, 2020
782020
Beyond human-level accuracy: Computational challenges in deep learning
J Hestness, N Ardalani, G Diamos
Proceedings of the 24th symposium on principles and practice of parallel …, 2019
692019
A comparative analysis of microarchitecture effects on CPU and GPU memory system behavior
J Hestness, SW Keckler, DA Wood
2014 IEEE International Symposium on Workload Characterization (IISWC), 150-160, 2014
692014
The Gem5 Simulator. SIGARCH Comput. Archit. News 39, 2 (Aug. 2011), 1–7
N Binkert, B Beckmann, G Black, SK Reinhardt, A Saidi, A Basu, ...
662011
GPU computing pipeline inefficiencies and optimization opportunities in heterogeneous CPU-GPU processors
J Hestness, SW Keckler, DA Wood
2015 IEEE International Symposium on Workload Characterization, 87-97, 2015
592015
Netrace: Dependency-tracking traces for efficient network-on-chip experimentation
J Hestness, SW Keckler
The University of Texas at Austin, Dept. of Computer Science, Tech. Rep, 2011
572011
Cerebras-gpt: Open compute-optimal language models trained on the cerebras wafer-scale cluster
N Dey, G Gosal, H Khachane, W Marshall, R Pathria, M Tom, J Hestness
arXiv preprint arXiv:2304.03208, 2023
372023
Pipelined backpropagation at scale: training large models without batches
A Kosson, V Chiley, A Venigalla, J Hestness, U Koster
Proceedings of Machine Learning and Systems 3, 479-501, 2021
262021
SlimPajama: A 627B token cleaned and deduplicated version of RedPajama
D Soboleva, F Al-Khateeb, R Myers, JR Steeves, J Hestness, N Dey
June, 2023
212023
A QoS-enabled on-die interconnect fabric for kilo-node chips
B Grot, J Hestness, S Keckler, O Mutlu
Ieee Micro 32 (3), 17-25, 2012
182012
Fftw and complex ambiguity function performance on the maestro processor
K Singh, JP Walters, J Hestness, J Suh, CM Rogers, SP Crago
2011 Aerospace Conference, 1-8, 2011
172011
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