Sheldon X.-D. Tan
Title
Cited by
Cited by
Year
Reliability-constrained area optimization of VLSI power/ground networks via sequence of linear programmings
SXD Tan, CJR Shi, JC Lee
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
1612003
Advanced model order reduction techniques in VLSI design
S Tan, L He
Cambridge university press, 2007
1572007
Canonical symbolic analysis of large analog circuits with determinant decision diagrams
CJR Shi, XD Tan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000
1552000
Pathological element-based active device models and their application to symbolic analysis
C Sánchez-López, FV Fernández, E Tlelo-Cuautle, SXD Tan
IEEE Transactions on Circuits and Systems I: Regular Papers 58 (6), 1382-1395, 2011
1302011
Physics-based electromigration assessment for power grid networks
X Huang, T Yu, V Sukharev, SXD Tan
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
942014
A systematic method for functional unit power estimation in microprocessors
W Wu, L Jin, J Yang, P Liu, SXD Tan
2006 43rd ACM/IEEE Design Automation Conference, 554-557, 2006
932006
Fast power/ground network optimization based on equivalent circuit modeling
XDS Tan, CJR Shi
Proceedings of the 38th annual Design Automation Conference, 550-554, 2001
922001
Compact representation and efficient generation of s-expanded symbolic network functions for computer-aided analog circuit design
CJR Shi, XD Tan
IEEE Transactions on computer-aided design of integrated circuits and …, 2001
842001
Dynamic FPGA routing for just-in-time FPGA compilation
R Lysecky, F Vahid, SXD Tan
Proceedings of the 41st annual Design Automation Conference, 954-959, 2004
792004
Hierarchical symbolic analysis of analog integrated circuits via determinant decision diagrams
XD Tan, CJR Shi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000
722000
Design of analog circuits through symbolic analysis
M Fakhfakh, E Tlelo-Cuautle, FV Fernández
Bentham Science Publishers, 2012
712012
Fast thermal simulation for architecture level dynamic thermal management
P Liu, Z Qi, H Li, L Jin, W Wu, SXD Tan, J Yang
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005
582005
Symbolic analysis of analog circuits containing voltage mirrors and current mirrors
E Tlelo-Cuautle, C Sánchez-López, E Martínez-Romero, SXD Tan
Analog Integrated Circuits and Signal Processing 65 (1), 89-95, 2010
542010
GPU friendly fast Poisson solver for structured power grid network analysis
J Shi, Y Cai, W Hou, L Ma, SXD Tan, PH Ho, X Wang
2009 46th ACM/IEEE Design Automation Conference, 178-183, 2009
542009
Partitioning-based approach to fast on-chip decap budgeting and minimization
H Li, Z Qi, SXD Tan, L Wu, Y Cai, X Hong
Proceedings of the 42nd annual Design Automation Conference, 170-175, 2005
502005
A fast decoupling capacitor budgeting algorithm for robust on-chip power delivery
J Fu, Z Luo, X Hong, Y Cai, SXD Tan, Z Pan
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and …, 2004
502004
Efficient power modeling and software thermal sensing for runtime temperature monitoring
W Wu, L Jin, J Yang, P Liu, SXD Tan
ACM Transactions on Design Automation of Electronic Systems (TODAES) 12 (3 …, 2008
442008
Physics-based electromigration models and full-chip assessment for power grid networks
X Huang, A Kteyan, SXD Tan, V Sukharev
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016
422016
An efficient method for terminal reduction of interconnect circuits considering delay variations
P Liu, SXD Tan, H Li, Z Qi, J Kong, B McGaughy, L He
ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005 …, 2005
422005
Statistical analysis of on-chip power delivery networks considering lognormal leakage current variations with spatial correlation
N Mi, J Fan, SXD Tan, Y Cai, X Hong
IEEE Transactions on Circuits and Systems I: Regular Papers 55 (7), 2064-2075, 2008
39*2008
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Articles 1–20