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Rafael B. Schvittz
Rafael B. Schvittz
Verified email at furg.br
Title
Cited by
Cited by
Year
Fault masking ratio analysis of majority voters topologies
IFV Oliveira, RB Schvittz, PF Butzen
2018 IEEE 19th Latin-American Test Symposium (LATS), 1-6, 2018
122018
Single event transient sensitivity analysis of different 32 nm CMOS majority voters designs
IFV Oliveira, RB Schvittz, PF Butzen
Microelectronics Reliability 100, 113369, 2019
82019
Probabilistic method for reliability estimation of sp-networks considering single event transient faults
R Schvittz, DT Franco, LS Rosa, PF Butzen
2018 25th IEEE International Conference on Electronics, Circuits and Systems …, 2018
72018
Survey on reliability estimation in digital circuits
MF Pontes, C Farias, R Schvittz, P Butzen, L da Rosa Jr
Journal of Integrated Circuits and Systems 16 (3), 1-11, 2021
62021
The suitability of the spr-mp method to evaluate the reliability of logic circuits
MF Pontes, PF Butzen, RB Schvittz, SL Rosa, DT Franco
2018 25th IEEE International Conference on Electronics, Circuits and Systems …, 2018
62018
Comparing analytical and monte-carlo-based simulation methods for logic gates set sensitivity evaluation
RB Schvittz, YQ Aguiar, F Wrobel, JL Autran, LS Rosa Jr, PF Butzen
Microelectronics Reliability 114, 113871, 2020
42020
A simplified layout-level method for single event transient faults susceptibility on logic gates
R Schvittz, DT Franco, L Soares, PF Butzen
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019
42019
The impact of logic gates susceptibility in overall circuit reliability analysis
MF Pontes, IFV Oliveira, RB Schvittz, LS Rosa, PF Butzen
2022 IEEE International Symposium on Circuits and Systems (ISCAS), 1610-1614, 2022
32022
Methods for susceptibility analysis of logic gates in the presence of single event transients
RB Schvittz, PF Butzen, LS da Rosa
2020 IEEE International Test Conference (ITC), 1-9, 2020
32020
Evaluating Soft Error Reliability of Combinational Circuits Using a Monte Carlo Based Method
CR Farias, RB Schvittz, TR Balen, PF Butzen
2022 IEEE 23rd Latin American Test Symposium (LATS), 1-6, 2022
22022
Reliability evaluation of voters for fault tolerant approximate systems
TR Balen, CJ González, IFV Oliveira, RB Schvittz, N Added, ...
2021 IEEE 22nd Latin American Test Symposium (LATS), 1-6, 2021
22021
Exploring logic gates layout to improve the accuracy of circuit reliability estimation
R Schvittz, L Soares, PF Butzen
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration …, 2019
22019
Fault tolerance evaluation of different majority voter designs
IFV Oliveira, MF Pontes, RB Schvittz, LS Rosa, PF Butzen, RI Soares
2022 IEEE International Symposium on Circuits and Systems (ISCAS), 185-189, 2022
12022
An improved technique for logic gate susceptibility evaluation of single event transient faults
RB Schvittz, DT Franco, LS da Rosa, PF Butzen
VLSI-SoC: New Technology Enabler: 27th IFIP WG 10.5/IEEE International …, 2020
12020
Evaluating the Reliability of Different Voting Schemes for Fault Tolerant Approximate Systems
TR Balen, CJ González, IFV Oliveira, LS da Rosa Jr, RI Soares, ...
Journal of Electronic Testing 39 (4), 409-420, 2023
2023
Impact on Radiation Robustness of Gate Mapping in FinFET Circuits under Work-function Fluctuation
BB Sandoval, LH Brendler, FL Kastensmidt, R Reis, AL Zimpeck, ...
2023 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2023
2023
Improving Soft Error Robustness of Full Adder Circuits with Decoupling Cell and Transistor Sizing
RNM Oliveira, FGRG da Silva, R Reis, RB Schvittz, C Meinhardt
2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems …, 2022
2022
CREsT-Uma Ferramenta para o Auxílio do Ensino de Confiabilidade em Circuitos Digitais
LQ Jurgina, MF Pontes, CR Farias, G Manske, RB Schvittz, PF Butzen, ...
Anais do XXXII Simpósio Brasileiro de Informática na Educação, 191-202, 2021
2021
Análise da suscetibilidade de portas lógicas na presença de falhas de efeitos singulares
RB Schvittz
Universidade Federal de Pelotas, 2020
2020
Reliability evaluation of circuits designed in multi-and single-stage versions
RB Schvittz, M Pontes, C Meinhardt, DT Franco, L Naviner, LS da Rosa, ...
2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS), 1-4, 2018
2018
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Articles 1–20