Di Wu
Title
Cited by
Cited by
Year
Energy-efficient CNN implementation on a deeply pipelined FPGA cluster
C Zhang, D Wu, J Sun, G Sun, G Luo, J Cong
Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016
1802016
Programming and runtime support to blaze FPGA accelerator deployment at datacenter scale
M Huang, D Wu, CH Yu, Z Fang, M Interlandi, T Condie, J Cong
Proceedings of the Seventh ACM Symposium on Cloud Computing, 456-469, 2016
852016
Oscillatory neurocomputing with ring attractors: a network architecture for mapping locations in space onto patterns of neural synchrony
HT Blair, A Wu, J Cong
Philosophical Transactions of the Royal Society B: Biological Sciences 369 …, 2014
242014
Heterogeneous datacenters: Options and opportunities
J Cong, M Huang, D Wu, CH Yu
2016 53nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2016
222016
CPU-FPGA coscheduling for big data applications
J Cong, Z Fang, M Huang, L Wang, D Wu
IEEE Design & Test 35 (1), 16-22, 2017
152017
Software infrastructure for enabling FPGA-based accelerations in data centers
J Cong, M Huang, P Pan, D Wu, P Zhang
Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016
152016
Hardware computing for brain network analysis
Y Wang, Y He, Y Shan, T Wu, D Wu, H Yang
2nd Asia Symposium on Quality Electronic Design (ASQED), 219-222, 2010
152010
Acceleration of ranking algorithms using a graphics processing unit
N Xu, A Wu, J Li, Y Wang, C Zhao, FH Hsu
US Patent App. 13/222,396, 2013
122013
Fpga simulation engine for customized construction of neural microcircuits
HT Blair, J Cong, D Wu
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 607-614, 2013
112013
Customizable computing—from single chip to datacenters
J Cong, Z Fang, M Huang, P Wei, D Wu, CH Yu
Proceedings of the IEEE 107 (1), 185-203, 2018
102018
FPGA implementation of EM algorithm for 3D CT reconstruction
YK Choi, J Cong, D Wu
2014 IEEE 22nd Annual International Symposium on Field-Programmable Custom …, 2014
102014
Making human connectome faster: GPU acceleration of brain network analysis
D Wu, T Wu, Y Shan, Y Wang, Y He, N Xu, H Yang
2010 IEEE 16th International Conference on Parallel and Distributed Systems …, 2010
92010
A heterogeneous accelerator platform for multi-subject voxel-based brain network analysis
Y Wang, M Xu, L Ren, X Zhang, D Wu, Y He, N Xu, H Yang
2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 339-344, 2011
52011
CPU-FPGA co-optimization for big data applications: A case study of in-memory Samtool sorting
J Cong, Z Fang, M Huang, L Wang, D Wu
Proceedings of the 2017 ACM/SIGDA International Symposium on Field …, 2017
42017
K-Flow: A Programming and Scheduling Framework to Optimize Dataflow Execution on CPU-FPGA Platforms
J Cong, Z Fang, Y Hu, D Wu
Proceedings of the 2018 ACM/SIGDA International Symposium on Field …, 2018
22018
FPGA simulation engine for customized construction of neural microcircuit
J Cong, HT Blair, D Wu
2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013
22013
Gemma in April: A matrix-like parallel programming architecture on OpenCL
T Wu, D Wu, Y Wang, X Zhang, H Luo, N Xu, H Yang
2011 Design, Automation & Test in Europe, 1-6, 2011
22011
MOCHA: Multinode Cost Optimization in Heterogeneous Clouds with Accelerators
P Zhou, J Sheng, CH Yu, P Wei, J Wang, D Wu, J Cong
The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021
2021
Scaling Accelerator-Rich Systems for Big-Data Analytics
D Wu
University of California, Los Angeles, 2017
2017
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Articles 1–19