| Physical unclonable functions for device authentication and secret key generation GE Suh, S Devadas Proceedings of the 44th annual design automation conference, 9-14, 2007 | 2784 | 2007 |
| Extracting secret keys from integrated circuits D Lim, JW Lee, B Gassend, GE Suh, M Van Dijk, S Devadas IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (10 …, 2005 | 1177 | 2005 |
| A technique to build a secret key in integrated circuits for identification and authentication applications JW Lee, D Lim, B Gassend, GE Suh, M Van Dijk, S Devadas 2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No …, 2004 | 1042 | 2004 |
| Secure program execution via dynamic information flow tracking GE Suh, JW Lee, D Zhang, S Devadas Acm Sigplan Notices 39 (11), 85-96, 2004 | 1035 | 2004 |
| AEGIS: Architecture for tamper-evident and tamper-resistant processing GE Suh, D Clarke, B Gassend, M Van Dijk, S Devadas ACM International Conference on Supercomputing 25th Anniversary Volume, 357-368, 2003 | 836 | 2003 |
| Dynamic partitioning of shared cache memory GE Suh, L Rudolph, S Devadas The Journal of Supercomputing 28 (1), 7-26, 2004 | 521 | 2004 |
| Design and implementation of PUF-based" unclonable" RFID ICs for anti-counterfeiting and security applications S Devadas, E Suh, S Paral, R Sowell, T Ziola, V Khandelwal 2008 IEEE international conference on RFID, 58-64, 2008 | 425 | 2008 |
| Efficient memory integrity verification and encryption for secure processors GE Suh, D Clarke, B Gasend, M Van Dijk, S Devadas Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003 | 413* | 2003 |
| A new memory monitoring scheme for memory-aware scheduling and partitioning GE Suh, S Devadas, L Rudolph Proceedings Eighth International Symposium on High Performance Computer …, 2002 | 411 | 2002 |
| Caches and hash trees for efficient memory integrity verification B Gassend, GE Suh, D Clarke, M Van Dijk, S Devadas The Ninth International Symposium on High-Performance Computer Architecture …, 2003 | 380 | 2003 |
| Design and implementation of the AEGIS single-chip secure processor using physical random functions GE Suh, CW O'Donnell, I Sachdev, S Devadas 32nd International Symposium on Computer Architecture (ISCA'05), 25-36, 2005 | 318 | 2005 |
| A hardware design language for timing-sensitive information-flow security D Zhang, Y Wang, GE Suh, AC Myers Acm Sigplan Notices 50 (4), 503-516, 2015 | 255 | 2015 |
| FPGA-based remote power side-channel attacks M Zhao, GE Suh 2018 IEEE Symposium on Security and Privacy (SP), 229-244, 2018 | 230 | 2018 |
| Authentication with physical unclonable functions T Ziola, Z Paral, S Devadas, GE Suh, V Khandelwal US Patent 8,782,396, 2014 | 222 | 2014 |
| Aegis: A single-chip secure processor GE Suh, CW O'Donnell, S Devadas IEEE Design & Test of Computers 24 (6), 570-580, 2007 | 209 | 2007 |
| Analytical cache models with applications to cache partitioning GE Suh, S Devadas, L Rudolph ACM International Conference on Supercomputing 25th Anniversary Volume, 323-334, 2001 | 205 | 2001 |
| Reverse engineering convolutional neural networks through side-channel information leaks W Hua, Z Zhang, GE Suh Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 199 | 2018 |
| AEGIS: A single-chip secure processor GE Suh, CW O'Donnell, S Devadas Information Security Technical Report 10 (2), 63-73, 2005 | 186 | 2005 |
| Flash memory for ubiquitous hardware security functions: True random number generation and device fingerprints Y Wang, W Yu, S Wu, G Malysa, GE Suh, EC Kan 2012 IEEE Symposium on Security and Privacy, 33-47, 2012 | 145 | 2012 |
| Channel gating neural networks W Hua, Y Zhou, CM De Sa, Z Zhang, GE Suh Advances in Neural Information Processing Systems 32, 2019 | 143 | 2019 |
Srinivas DevadasEdwin Sibley Webster Professor of Electrical Engineering and Computer Science, MITVerified email at mit.edu
