| Efficient VLSI Implementation of Neural Networks With Hyperbolic Tangent Activation Function B Zamanlooy, M Mirhassani IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (1), 39 - 48, 2014 | 175 | 2014 |
| A 116Gb/s DSP-based wireline transceiver in 7nm CMOS achieving 6pJ/b at 45dB loss in PAM-4/Duo-PAM-4 and 52dB in PAM-2 MA LaCroix, E Chong, W Shen, E Nir, FA Musa, H Mei, MM Mohsenpour, ... 2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 132-134, 2021 | 46 | 2021 |
| A 14-GHz Bang-Bang Digital PLL with sub-150fs Integrated Jitter for Wireline Applications in 7nm FinFET D Pfaff, R Abbott, XJ Wang, B Zamanlooy, S Moazzeni, R Smith, CC Lin 2019 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2019 | 27* | 2019 |
| An Analog CVNS-Based Sigmoid Neuron for Precise Neurochips B Zamanlooy, M Mirhassani IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017 | 21 | 2017 |
| CVNS Synapse Multiplier for Robust Neurochips With On-Chip Learning B Zamanlooy, M Mirhassani IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2014 | 5 | 2014 |
| Efficient hardware implementation of threshold neural networks B Zamanlooy, M Mirhassani New Circuits and Systems Conference (NEWCAS), 2012 IEEE 10th International, 1-4, 2012 | 5 | 2012 |
| Area-Efficient Robust Madaline Based on Continuous Valued Number System B Zamanlooy, M Mirhassani Neurocomuting, 2014 | 4 | 2014 |
| Mixed-signal VLSI neural network based on Continuous Valued Number System B Zamanlooy, M Mirhassani Neurocomputing 221, 15-23, 2017 | 2 | 2017 |
| Complexity Study of the Continuous Valued Number System Adders B Zamanlooy, A Novak, M Mirhassani Multiple-Valued Logic (ISMVL), 2012 42nd IEEE International Symposium on …, 2012 | 2 | 2012 |
| A 224Gb/s 3pJ/b 40dB Insertion Loss Transceiver in 3nm FinFET CMOS D Pfaff, M Nummer, N Hai, P Xia, KG Yang, MM Mohsenpour, MA LaCroix, ... 2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 128-130, 2024 | | 2024 |
| Review of Arithmetic Operations Using the Continuous Valued Number System B Zamanlooy, M Mirhassani, M Ahmadi MWSCAS 2018, 2018 | | 2018 |
| Robust Analog Arithmetic Based on the Continuous Valued Number System B Zamanlooy, M Mirhassani Embedded Systems Design with Special Arithmetic and Number Systems, 149-181, 2017 | | 2017 |
| Mixed-Signal VLSI Implementation of CVNS Artificial Neural Networks B Zamanlooy University of Windsor, 2014 | | 2014 |
| Area Efficient Low-Sensitivity Lumped Madaline Based on Continuous Valued Number System B Zamanlooy, M Mirhassani IEEE International Symposium on Circuits and Systems (ISCAS), 2241-2244, 2014 | | 2014 |
| System-level design of low complexity CVNS feed forward neural network M Mirhassani, B Zamanlooy Circuits and Systems (ISCAS), Proceedings of 2010 IEEE International …, 2010 | | 2010 |
