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Hao Wang
Hao Wang
Nvidia, Meta/Facebook, UW-Madison
Verified email at nvidia.com - Homepage
Title
Cited by
Cited by
Year
TPP: Transparent page placement for CXL-enabled tiered-memory
HA Maruf, H Wang, A Dhanotia, J Weiner, N Agarwal, P Bhattacharya, ...
Proceedings of the 28th ACM International Conference on Architectural …, 2023
892023
Workload and power budget partitioning for single-chip heterogeneous processors
H Wang, V Sathish, R Singh, MJ Schulte, NS Kim
Proceedings of the 21st international conference on Parallel architectures …, 2012
802012
TMO: Transparent memory offloading in datacenters
J Weiner, N Agarwal, D Schatzberg, L Yang, H Wang, B Sanouillet, ...
Proceedings of the 27th ACM International Conference on Architectural …, 2022
592022
Memory scheduling towards high-throughput cooperative heterogeneous computing
H Wang, R Singh, MJ Schulte, NS Kim
Proceedings of the 23rd international conference on Parallel architectures …, 2014
252014
Workload-Aware Voltage Regulator Optimization for Power Efficient Multi-Core Processors
AA Sinkar, H Wang, NS Kim
Design, Automation & Test in Europe, 2012
242012
Computer architecture having selectable, parallel and serial communication channels between processors and memory
H Wang, NS Kim
US Patent 10,108,220, 2018
232018
DUANG: Fast and lightweight page migration in asymmetric memory systems
H Wang, J Zhang, S Shridhar, G Park, M Jung, NS Kim
2016 IEEE International Symposium on High Performance Computer Architecture …, 2016
152016
Workload-aware optimal power allocation on single-chip heterogeneous processors
JY Jang, H Wang, E Kwon, JW Lee, NS Kim
IEEE Transactions on Parallel and Distributed Systems 27 (6), 1838-1851, 2015
112015
Shared row buffer system for asymmetric memory
H Wang, NS Kim
US Patent 9,959,205, 2018
82018
Improving throughput of power-constrained many-core processors based on unreliable devices
H Wang, NS Kim
IEEE Micro 33 (4), 16-24, 2013
82013
Memory controller for heterogeneous computer
H Wang, NS Kim
US Patent 9,501,227, 2016
72016
Alloy: Parallel-serial memory channel architecture for single-chip heterogeneous processor systems
H Wang, CJ Park, G Byun, JH Ahn, NS Kim
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
72015
Improving platform energy-chip area trade-off in near-threshold computing environment
H Wang, AA Sinkar, NS Kim
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 318-325, 2013
72013
Maximizing throughput of power/thermal-constrained processors by balancing power consumption of cores
AA Sinkar, H Wang, NS Kim
Fifteenth International Symposium on Quality Electronic Design, 633-638, 2014
62014
Temperature dependence of the interface state distribution due to hot carrier effect in FinFET device
C Ma, H Wang, C Zhang, X Zhang, J He, X Zhang
Microelectronics Reliability 50 (8), 1077-1080, 2010
62010
Impact of random dopant fluctuation effect on surrounding gate MOSFETs: from atomic level simulation to circuit performance evaluation
H Wang, C Ma, C Zhang, F He, X Zhang, X Lin
Nanoelectronics Conference (INEC), 2010 3rd International, 1136-1137, 2010
32010
System and method to prefetch pointer based structures
H Wang, F Chen, L Kou
US Patent App. 16/589,706, 2021
22021
Method to avoid cache access conflict between load and fill
T Nakra, H Wang, P Kitchin
US Patent 10,649,900, 2020
22020
Asymmetric issues of FinFET device after hot carrier injection and impact on digital and analog circuits
C Ma, H Wang, X Zhang, F He, Y He, X Zhang, X Lin
2010 11th International Symposium on Quality Electronic Design (ISQED), 432-436, 2010
22010
Workload Behavior Driven Memory Subsystem Design for Hyperscale
S Mahar, H Wang, W Shu, A Dhanotia
arXiv preprint arXiv:2303.08396, 2023
12023
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