| Fast support for unstructured data processing: the unified automata processor Y Fang, TT Hoang, M Becchi, AA Chien Proceedings of the 48th International Symposium on Microarchitecture (MICRO …, 2015 | 87 | 2015 |
| A high-speed, energy-efficient two-cycle multiply-accumulate (MAC) architecture and its application to a double-throughput MAC unit TT Hoang, M Själander, P Larsson-Edefors IEEE Transactions on Circuits and Systems I: Regular Papers 57 (12), 3073-3081, 2010 | 85 | 2010 |
| A low complexity, low power, programmable QRS detector based on wavelet transform for implantable pacemaker IC TT Hoang, JP Son, YR Kang, CR Kim, HY Chung, SW Kim 2006 IEEE International SOC Conference, 160-163, 2006 | 23 | 2006 |
| Realization of neural networks with ternary inputs and binary weights in NAND memory arrays TT Hoang, WH Choi, M Lueker-boden US Patent 11,170,290B2, 2021 | 22 | 2021 |
| A Data Layout Transformation (DLT) accelerator: Architectural support for data movement optimization in accelerated-centric heterogeneous systems TT Hoang, A Shambayati, AA Chien Design, Automation & Test in Europe Conference & Exhibition (DATE), 2016 …, 2016 | 22* | 2016 |
| Performance and energy limits of a processor-integrated FFT accelerator HT Tung, A Shambayati, C Deutschbein, H Hoffmann, AA Chien IEEE High Performance Extreme Computing Conference (HPEC'14), 2014 | 19 | 2014 |
| An In-Flash Binary Neural Network Accelerator with SLC NAND Flash Array WH Choi, PF Chiu, W Ma, G Hemink, TT Hoang, M Lueker-Boden, ... 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 17 | 2020 |
| Realization of neural networks with ternary inputs and ternary weights in nand memory arrays TT Hoang, WH Choi, M Lueker-boden US Patent 0,110,244, 2023 | 16 | 2023 |
| Design space exploration for an embedded processor with flexible datapath interconnect TT Hoang, U Jälmbrant, E der Hagopian, KP Subramaniyan, M Själander, ... ASAP 2010-21st IEEE International Conference on Application-specific Systems …, 2010 | 16 | 2010 |
| Multi-leads ECG premature ventricular contraction detection using tensor decomposition and convolutional neural network T Hoang, N Fahier, WC Fang 2019 IEEE Biomedical Circuits and Systems Conference (BioCAS), 1-4, 2019 | 14 | 2019 |
| Accelerating sparse matrix multiplication in storage class memory-based convolutional neural network inference TT Hoang, WH Choi, M Lueker-boden US Patent 11,568,200, 2023 | 13 | 2023 |
| 10x10: A case study in highly-programmable and energy-efficient heterogeneous federated architecture AA Chien, TT Hoang, D Vasudevan, Y Fang, A Shambayati ACM SIGARCH Computer Architecture News and UChicago Computer Science …, 2015 | 13 | 2015 |
| High-speed, energy-efficient 2-cycle multiply-accumulate architecture TT Hoang, M Själander, P Larsson-Edefors SOC Conference, 2009. SOCC 2009. IEEE International, 119-122, 2009 | 13 | 2009 |
| Data-width-driven power gating of integer arithmetic circuits TT Hoang, P Larsson-Edefors 2012 IEEE Computer Society Annual Symposium on VLSI, 237-242, 2012 | 12 | 2012 |
| Viterbi accelerator for embedded processor datapaths MW Azhar, M Själander, H Ali, A Vijayashekar, TT Hoang, KK Ansari, ... 2012 IEEE 23rd International Conference on Application-Specific Systems …, 2012 | 10 | 2012 |
| Double throughput multiply-accumulate unit for FlexCore processor enhancements TT Hoang, M Sjalander, P Larsson-Edefors 2009 IEEE International Symposium on Parallel & Distributed Processing, 1-7, 2009 | 10 | 2009 |
| Dynamic resource management in circuit bound array architecture TT Hoang, M Lueker-Boden, A Kulkarni US Patent 11,081,474, 2021 | 8 | 2021 |
| A System for Validating Resistive Neural Network Prototypes B Hoskins, W Ma, M Fream, O Yousuf, M Daniels, J Goodwill, ... International Conference on Neuromorphic Systems 2021, 1-5, 2021 | 7 | 2021 |
| Cyclic redundancy checking (CRC) accelerator for the FlexCore processor MW Azhar, TT Hoang, P Larsson-Edefors 2010 13th Euromicro Conference on Digital System Design: Architectures …, 2010 | 7 | 2010 |
| Power gating multiplier of embedded processor datapath TT Hoang, V Saseendran, D Siaudinis, P Larsson-Edefors Ph. D. Research in Microelectronics and Electronics (PRIME), 2011 7th …, 2011 | 6 | 2011 |
Per Larsson-EdeforsProfessor, Chalmers University of TechnologyVerified email at chalmers.se
