{GAZELLE}: A low latency framework for secure neural network inference C Juvekar, V Vaikuntanathan, A Chandrakasan 27th USENIX security symposium (USENIX security 18), 1651-1669, 2018 | 1072 | 2018 |
An energy-efficient reconfigurable DTLS cryptographic engine for End-to-End security in iot applications U Banerjee, C Juvekar, A Wright, AP Chandrakasan 2018 IEEE International Solid-State Circuits Conference-(ISSCC), 42-44, 2018 | 105* | 2018 |
FAB: An FPGA-based accelerator for bootstrappable fully homomorphic encryption R Agrawal, L de Castro, G Yang, C Juvekar, R Yazicigil, A Chandrakasan, ... 2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023 | 90 | 2023 |
A 249-Mpixel/s HEVC video-decoder chip for 4K ultra-HD applications M Tikekar, CT Huang, C Juvekar, V Sze, AP Chandrakasan IEEE Journal of Solid-State Circuits 49 (1), 61-72, 2013 | 81 | 2013 |
Arvind, and AP Chandrakasan,“ U Banerjee, C Juvekar, A Wright An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for End-to-End …, 2018 | 53 | 2018 |
eeDTLS: Energy-efficient datagram transport layer security for the Internet of Things U Banerjee, C Juvekar, SH Fuller, AP Chandrakasan GLOBECOM 2017-2017 IEEE Global Communications Conference, 1-6, 2017 | 48 | 2017 |
Does fully homomorphic encryption need compute acceleration? L de Castro, R Agrawal, R Yazicigil, A Chandrakasan, V Vaikuntanathan, ... arXiv preprint arXiv:2112.06396, 2021 | 47 | 2021 |
A 249Mpixel/s HEVC video-decoder chip for quad full HD applications CT Huang, M Tikekar, C Juvekar, V Sze, A Chandrakasan 2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013 | 44 | 2013 |
A nonvolatile flip-flop-enabled cryptographic wireless authentication tag with per-query key update and power-glitch attack countermeasures HM Lee, CS Juvekar, J Kwong, AP Chandrakasan IEEE Journal of Solid-State Circuits 52 (1), 272-283, 2016 | 29 | 2016 |
An actively detuned wireless power receiver with public key cryptographic authentication and dynamic power allocation N Desai, C Juvekar, S Chandak, AP Chandrakasan IEEE Journal of Solid-State Circuits 53 (1), 236-246, 2017 | 27 | 2017 |
Ultra-fast bit-level frequency-hopping transmitter for securing low-power wireless devices RT Yazicigil, P Nadeau, D Richman, C Juvekar, K Vaidya, ... 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 176-179, 2018 | 25 | 2018 |
Fast vector oblivious linear evaluation from ring learning with errors L de Castro, C Juvekar, V Vaikuntanathan Proceedings of the 9th on Workshop on Encrypted Computing & Applied …, 2021 | 24 | 2021 |
CMOS THz-ID: A 1.6-mm˛ package-less identification tag using asymmetric cryptography and 260-GHz far-field backscatter communication MIW Khan, MI Ibrahim, CS Juvekar, W Jung, RT Yazicigil, ... IEEE Journal of Solid-State Circuits 56 (2), 340-354, 2020 | 23 | 2020 |
Beyond crypto: Physical-layer security for Internet of Things devices RT Yazicigil, PM Nadeau, DD Richman, C Juvekar, S Maji, U Banerjee, ... IEEE Solid-State Circuits Magazine 12 (4), 66-78, 2020 | 18 | 2020 |
16.2 A Keccak-based wireless authentication tag with per-query key update and power-glitch attack countermeasures CS Juvekar, HM Lee, J Kwong, AP Chandrakasan 2016 IEEE International Solid-State Circuits Conference (ISSCC), 290-291, 2016 | 16 | 2016 |
29.8 thzid: A 1.6 mm2 package-less cryptographic identification tag with backscattering and beam-steering at 260Ghz MI Ibrahim, MIW Khan, CS Juvekar, W Jung, RT Yazicigil, ... 2020 IEEE International Solid-State Circuits Conference-(ISSCC), 454-456, 2020 | 15 | 2020 |
Mad: Memory-aware design techniques for accelerating fully homomorphic encryption R Agrawal, L De Castro, C Juvekar, A Chandrakasan, V Vaikuntanathan, ... Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023 | 12 | 2023 |
Dual mode ferroelectric random access memory (FRAM) cell apparatus and methods with imprinted read-only (RO) data C Juvekar, J Kwong, C Bittlestone, S Ramaswamy, SK Heinrich-Barna US Patent 9,401,196, 2016 | 12 | 2016 |
Dual mode memory array security apparatus, systems and methods C Juvekar, J Kwong, C Bittlestone, S Ramaswamy US Patent 10,068,631, 2018 | 8 | 2018 |
HEVC interpolation filter architecture for quad full HD decoding CT Huang, C Juvekar, M Tikekar, AP Chandrakasan 2013 Visual Communications and Image Processing (VCIP), 1-5, 2013 | 8 | 2013 |