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Mehul Tikekar
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Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis
M Qazi, M Tikekar, L Dolecek, D Shah, A Chandrakasan
2010 Design, automation & test in Europe conference & exhibition (DATE 2010 …, 2010
1032010
A 249-Mpixel/s HEVC video-decoder chip for 4K ultra-HD applications
M Tikekar, CT Huang, C Juvekar, V Sze, AP Chandrakasan
IEEE Journal of Solid-State Circuits 49 (1), 61-72, 2013
822013
A 249Mpixel/s HEVC video-decoder chip for quad full HD applications
CT Huang, M Tikekar, C Juvekar, V Sze, A Chandrakasan
2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013
432013
Memory-hierarchical and mode-adaptive HEVC intra prediction architecture for quad full HD video decoding
CT Huang, M Tikekar, AP Chandrakasan
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (7 …, 2013
312013
Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization
M Tikekar, CT Huang, V Sze, A Chandrakasan
2014 IEEE International Conference on Image Processing (ICIP), 2100-2104, 2014
262014
A fully integrated energy-efficient H. 265/HEVC decoder with eDRAM for wearable devices
M Tikekar, V Sze, AP Chandrakasan
IEEE Journal of Solid-State Circuits 53 (8), 2368-2377, 2018
132018
An energy-scalable accelerator for blind image deblurring
P Raina, M Tikekar, AP Chandrakasan
IEEE Journal of Solid-State Circuits 52 (7), 1849-1862, 2017
92017
HEVC interpolation filter architecture for quad full HD decoding
CT Huang, C Juvekar, M Tikekar, AP Chandrakasan
2013 Visual Communications and Image Processing (VCIP), 1-5, 2013
82013
Circuit implementations for high-efficiency video coding tools
MMD Tikekar
Massachusetts Institute of Technology, 2012
72012
Core transform property for practical throughput hardware design
M Tikekar, CT Huang, C Juvekar, A Chandrakasan
7th meeting of the Joint Collaborative Team on Video Coding (JCT-VC), 2011
72011
Energy-efficient video decoding using data statistics
MMD Tikekar
Massachusetts Institute of Technology, 2017
32017
Technique for efficient evaluation of SRAM timing failure
M Qazi, M Tikekar, L Dolecek, D Shah, AP Chandrakasan
IEEE transactions on very large scale integration (VLSI) systems 21 (8 …, 2012
32012
An energy-efficient, fully integrated 1920x1080 h. 265/hevc decoder with edram
M Tikekar, V Sze, A Chandrakasan
Research Abstracts 49 (1), 1, 2018
12018
Decoder hardware architecture for HEVC
M Tikekar, CT Huang, C Juvekar, V Sze, A Chandrakasan
High Efficiency Video Coding (HEVC) Algorithms and Architectures, 303-341, 2014
12014
SPECIAL ISSUE ON THE 2013 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE (ISSCC)
T Fischer, B Nam, L Chang, T Kuroda, MAP Pertijs, J Warnock, Y Chan, ...
Full HD Integrated Video Encoder for H. 265/HEVC
M Tikekar, C Juvekar, AP Chandrakasan
Circuits and Systems for Information Processing, Communications, Multimedia …, 0
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