John WAWRZYNEK
John WAWRZYNEK
Verified email at berkeley.edu
Title
Cited by
Cited by
Year
Garp: A MIPS processor with a reconfigurable coprocessor
JR Hauser, J Wawrzynek
Proceedings. The 5th Annual IEEE Symposium on Field-Programmable Custom …, 1997
13161997
A view of the parallel computing landscape
K Asanovic, R Bodik, J Demmel, T Keaveny, K Keutzer, J Kubiatowicz, ...
Communications of the ACM 52 (10), 56-67, 2009
7632009
The Garp architecture and C compiler
TJ Callahan, JR Hauser, J Wawrzynek
Computer 33 (4), 62-69, 2000
6162000
Chisel: constructing hardware in a scala embedded language
J Bachrach, H Vo, B Richards, Y Lee, A Waterman, R Avižienis, ...
DAC Design Automation Conference 2012, 1212-1221, 2012
4852012
Fine-grain parallelism with minimal hardware support: A compiler-controlled threaded abstract machine
DE Culler, A Sah, KE Schauser, T Von Eicken, J Wawrzynek
ACM SIGARCH Computer Architecture News 19 (2), 164-175, 1991
4171991
Reconfigurable computing: what, why, and implications for design automation
A DeHon, J Wawrzynek
Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 610-615, 1999
3931999
BEE2: A high-end reconfigurable computing system
C Chang, J Wawrzynek, RW Brodersen
IEEE Design & Test of Computers 22 (2), 114-125, 2005
3912005
Stream computations organized for reconfigurable execution (SCORE)
E Caspi, M Chu, R Huang, J Yeh, J Wawrzynek, A DeHon
International Workshop on Field Programmable Logic and Applications, 605-614, 2000
3542000
HSRA: high-speed, hierarchical synchronous reconfigurable array
W Tsu, K Macy, A Joshi, R Huang, N Walker, T Tung, O Rowhani, ...
Proceedings of the 1999 ACM/SIGDA seventh international symposium on Field …, 1999
3291999
Silicon auditory processors as computer peripherals
J Lazzaro, J Wawrzynek, M Mahowald, M Sivilotti, D Gillespie
Advances in Neural Information Processing Systems, 820-827, 1993
2751993
TAM-a compiler controlled threaded abstract machine
DE Culler, SC Goldstein, KE Schauser, T Voneicken
Journal of Parallel and Distributed Computing 18 (3), 347-370, 1993
2501993
Vector microprocessors
K Asanovic, J Wawrzynek
University of California, Berkeley, 1998
2051998
RAMP: Research accelerator for multiple processors
J Wawrzynek, D Patterson, M Oskin, SL Lu, C Kozyrakis, JC Hoe, D Chiou, ...
IEEE micro 27 (2), 46-57, 2007
2012007
The cloud is not enough: Saving iot from the cloud
B Zhang, N Mor, J Kolb, DS Chan, K Lutz, E Allman, J Wawrzynek, E Lee, ...
7th {USENIX} Workshop on Hot Topics in Cloud Computing (HotCloud 15), 2015
1772015
A streaming multi-threaded model
E Caspi, A DeHon, J Wawrzynek
MSP-3, 2001
1602001
Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine
Y Markovskiy, E Caspi, R Huang, J Yeh, M Chu, J Wawrzynek, A DeHon
Proceedings of the 2002 ACM/SIGDA tenth international symposium on Field …, 2002
1582002
The SFRA: a corner-turn FPGA architecture
N Weaver, J Hauser, J Wawrzynek
Proceedings of the 2004 ACM/SIGDA 12th international symposium on Field …, 2004
1482004
Instruction-level parallelism for reconfigurable computing
TJ Callahan, J Wawrzynek
International Workshop on Field Programmable Logic and Applications, 248-257, 1998
1331998
Fast module mapping and placement for datapaths in FPGAs
TJ Callahan, P Chong, A DeHon, J Wawrzynek
Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field …, 1998
1331998
Spert-II: A vector microprocessor system
J Wawrzynek, K Asanovic, B Kingsbury, D Johnson, J Beck, N Morgan
Computer 29 (3), 79-86, 1996
1271996
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