A Temperature-to-Digital Converter for a MEMS-Based Programmable Oscillator With 0.5-ppm Frequency Stability and 1-ps Integrated Jitter MH Perrott, JC Salvia, FS Lee, A Partridge, S Mukherjee, C Arft, J Kim, ... IEEE JOURNAL OF SOLID-STATE CIRCUITS 48 (1), 1, 2013 | 118* | 2013 |
Techniques for improving the accuracy of geometric-programming based analog circuit design optimization J Kim, J Lee, L Vandenberghe, CKK Yang IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004 | 81 | 2004 |
A 0.8-V resistor-based temperature sensor in 65-nm CMOS with supply sensitivity of 0.28° C/V H Park, J Kim IEEE Journal of Solid-State Circuits 53 (3), 906-912, 2018 | 49 | 2018 |
A scalable bandwidth mismatch calibration technique for time-interleaved ADCs Y Park, J Kim, C Kim IEEE Transactions on Circuits and Systems I: Regular Papers 63 (11), 1889-1897, 2016 | 37 | 2016 |
Convex piecewise-linear modeling method for circuit optimization via geometric programming J Kim, L Vandenberghe, CKK Yang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 33 | 2010 |
A temperature-to-digital converter for a MEMS-based programmable oscillator with better than±0.5 ppm frequency stability M Perrott, J Salvia, F Lee, A Partridge, S Mukherjee, C Arft, JT Kim, ... 2012 IEEE International Solid-State Circuits Conference, 206-208, 2012 | 30 | 2012 |
Multilevel power optimization of pipelined A/D converters J Kim, S Limotyrakis, CKK Yang IEEE transactions on very large scale integration (VLSI) systems 19 (5), 832-845, 2010 | 26 | 2010 |
A 6-bit 2.5-GS/s time-interleaved analog-to-digital converter using resistor-array sharing digital-to-analog converter H Lee, S Park, J Kim, C Kim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (11 …, 2014 | 21 | 2014 |
Power-performance tradeoff analysis of CML-based high-speed transmitter designs using circuit-level optimization I Jang, Y Lee, SY Kim, J Kim IEEE Transactions on Circuits and Systems I: Regular Papers 63 (4), 540-550, 2016 | 17 | 2016 |
Flexible-assignment calibration technique for mismatch-constrained digital-to-analog converters J Kim, S Modjtahedi, CKK Yang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (9 …, 2013 | 14 | 2013 |
A Large-Swing Transformer-Boosted Serial Link Transmitter With Swing J Kim, H Hatamkhani, CKK Yang IEEE journal of solid-state circuits 42 (5), 1131-1142, 2007 | 14 | 2007 |
Circuit-level performance evaluation of Schottky tunneling transistor in mixed-signal applications J Kim, R Jhaveri, JCS Woo, CKK Yang IEEE transactions on nanotechnology 10 (2), 291-299, 2010 | 12 | 2010 |
A redundancy-based calibration technique for high-speed digital-to-analog converters J Kim, S Modjtahedi, CKK Yang IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (11 …, 2014 | 9 | 2014 |
Accurate delay models of CMOS CML circuits for design optimization I Jang, J Kim, SY Kim Analog Integrated Circuits and Signal Processing 82, 297-307, 2015 | 8 | 2015 |
A calibration technique for multibit stage pipelined A/D converters via least-squares method J Kim, CS Park IEEE Transactions on Instrumentation and Measurement 62 (12), 3390-3392, 2013 | 8 | 2013 |
Device-circuit co-optimization for mixed-mode circuit design via geometric programming J Kim, R Jhaveri, J Woo, CKK Yang 2007 IEEE/ACM International Conference on Computer-Aided Design, 470-475, 2007 | 7 | 2007 |
A convex macromodeling of dynamic comparator for analog circuit synthesis J Kim Analog Integrated Circuits and Signal Processing 77, 299-305, 2013 | 5 | 2013 |
Error reduction techniques in geometric programming based mixed-mode circuit design optimization J Kim University of California, Los Angeles, 2004 | 5 | 2004 |
A high-speed SerDes transceiver for wireless proximity communication J Kim, J Kim Journal of semiconductor technology and science 18 (1), 42-48, 2018 | 3 | 2018 |
An 8Gb/s Transformer-Boosted Transmitter with> VDD SWING J Kim, H Hatamkhani, CKK Yang IEEE ISSCC Dig. Tech. Papers, 94-95, 2006 | 3 | 2006 |