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Min Zhao
Min Zhao
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Cited by
Cited by
Year
Hierarchical analysis of power distribution networks
M Zhao, RV Panda, SS Sapatnekar, T Edwards, R Chaudhry, D Blaauw
Proceedings of the 37th Annual Design Automation Conference, 150-155, 2000
4562000
Statistical delay computation considering spatial correlations
A Agarwal, D Blaauw, V Zolotov, S Sundareswaran, M Zhao, K Gala, ...
Proceedings of the 2003 Asia and South Pacific Design Automation Conference …, 2003
2012003
Path-based statistical timing analysis considering inter-and intra-die correlations
A Agarwal, D Blaauw, V Zolotov, S Sundareswaran, M Zhao, K Gala, ...
Proc. TAU, 16-21, 2002
1272002
Inductance 101: Analysis and design issues
K Gala, D Blaauw, J Wang, V Zolotov, M Zhao
Proceedings of the 38th annual Design Automation Conference, 329-334, 2001
852001
Power grid analysis and optimization using algebraic multigrid
C Zhuo, J Hu, M Zhao, K Chen
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2008
602008
Optimal placement of power supply pads and pins
M Zhao, Y Fu, V Zolotov, S Sundareswaran, R Panda
Proceedings of the 41st annual Design Automation Conference, 165-170, 2004
532004
Technology mapping for domino logic
M Zhao, SS Sapatnekar
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided …, 1998
371998
A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming
M Zhao, R Panda, S Sundareswaran, S Yan, Y Fu
Proceedings of the 43rd annual Design Automation Conference, 217-222, 2006
322006
On-chip decoupling capacitance and power/ground network wire co-optimization to reduce dynamic noise
M Zhao, R Panda
US Patent 7,698,677, 2010
312010
Timing driven track routing considering coupling capacitance
D Wu, J Hu, M Zhao, R Mahapatra
Proceedings of the 2005 Asia and South Pacific Design Automation Conference …, 2005
312005
Layer assignment for crosstalk risk minimization
D Wu, J Hu, R Mahapatra, M Zhao
ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE …, 2004
252004
Fast on-chip inductance simulation using a precorrected-FFT method
H Hu, DT Blaauw, V Zolotov, K Gala, M Zhao, R Panda, SS Sapatnekar
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2003
232003
Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding
X Ye, P Li, M Zhao, R Panda, J Hu
2007 IEEE/ACM International Conference on Computer-Aided Design, 627-631, 2007
222007
Worst case clock skew under power supply variations
M Zhao, K Gala, V Zolotov, Y Fu, R Panda, R Ramkumar, B Agrawal
Proceedings of the 8th ACM/IEEE international workshop on Timing issues in …, 2002
222002
A new structural pattern matching algorithm for technology mapping
M Zhao, SS Sapatnekar
Proceedings of the 38th annual Design Automation Conference, 371-376, 2001
202001
Timing-driven partitioning and timing optimization of mixed static-domino implementations
M Zhao, SS Sapatnekar
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2000
172000
Dual-monotonic domino gate mapping and optimal output phase assignment of domino logic
M Zhao, SS Sapatnekar
2000 IEEE International Symposium on Circuits and Systems (ISCAS) 2, 309-312, 2000
162000
Fast on-chip decoupling capacitance budgeting method and device for reduced power supply noise
M Zhao, RV Panda, S Sundareswaran
US Patent 7,571,404, 2009
152009
Exploiting level sensitive latches in wire pipelining
V Seth, M Zhao, J Hu
IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004 …, 2004
142004
A novel technique for incremental analysis of on-chip power distribution networks
Y Fu, R Panda, B Reschke, S Sundareswaran, M Zhao
2007 IEEE/ACM International Conference on Computer-Aided Design, 817-823, 2007
122007
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