| High efficiency digital transmitter incorporating switching power supply and linear power amplifier OE Eliezer, G Feygin, J Mehta US Patent App. 12/147,477, 2009 | 258 | 2009 |
| Method and apparatus for a fully digital quadrature modulator OE Eliezer, FP Cruise, RB Staszewski, J Mehta US Patent 7,460,612, 2008 | 197 | 2008 |
| A 0.8mm2 all-digital SAW-less polar transmitter in 65nm EDGE SoC J Mehta, RB Staszewski, O Eliezer, S Rezeq, K Waheed, M Entezari, ... 2010 IEEE International Solid-State Circuits Conference-(ISSCC), 58-59, 2010 | 79 | 2010 |
| A 24mm2 Quad-Band Single-Chip GSM Radio with Transmitter Calibration in 90nm Digital CMOS RB Staszewski, D Leipold, O Eliezer, M Entezari, K Muhammad, I Bashir, ... 2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008 | 66 | 2008 |
| 9.1 A 45nm CMOS RF-to-Bits LTE/WCDMA FDD/TDD 2× 2 MIMO base-station transceiver SoC with 200MHz RF bandwidth N Klemmer, S Akhtar, V Srinivasan, P Litmanen, H Arora, S Uppathil, ... 2016 IEEE International Solid-State Circuits Conference (ISSCC), 164-165, 2016 | 41 | 2016 |
| An efficient linearization scheme for a digital polar EDGE transmitter J Mehta, V Zoicas, O Eliezer, RB Staszewski, S Rezeq, M Entezari, ... IEEE Transactions on Circuits and Systems II: Express Briefs 57 (3), 193-197, 2010 | 34 | 2010 |
| Predistortion methods and apparatus for transmitter linearization in a communication transceiver Y Wang, K Waheed, SS Rezeq, J Mehta, P Srinivasan, K Muhammad US Patent 8,170,507, 2012 | 32 | 2012 |
| Upsampling/interpolation and time alignment mechanism utilizing injection of high frequency noise JA Mehta, SS Rezeq, M Entezari, RB Staszewski US Patent App. 12/326,781, 2010 | 31 | 2010 |
| Predistortion mechanism for compensation of transistor size mismatch in a digital power amplifier JA Mehta, SS Rezeq, M Entezari, RB Staszewski US Patent App. 12/359,613, 2010 | 22 | 2010 |
| Radio-Frequency Digital-to-Analog Converters: Implementation in Nanoscale CMOS MS Alavi, J Mehta, RB Staszewski Academic Press, 2016 | 17 | 2016 |
| Accurate self-characterization of mismatches in a capacitor array of a digitally-controlled oscillator O Eliezer, B Staszewski, J Mehta, F Jabbar, I Bashir 2010 IEEE Dallas Circuits and Systems Workshop, 1-4, 2010 | 16 | 2010 |
| Skew compensation for multi-domain clock generation H Choo, H Safiri, N Klemmer, J Mehta, S Madhavapeddi, CK Sestok, ... US Patent 10,536,258, 2020 | 15 | 2020 |
| Predistortion system and method based on look up table interpolation JA Mehta, V Zoicas, S Rezeq US Patent 8,682,315, 2014 | 12 | 2014 |
| An EDGE transmitter with mitigation of oscillator pulling I Bashir, RB Staszewski, O Eliezer, K Waheed, V Zoicas, N Tal, J Mehta, ... 2010 IEEE Radio Frequency Integrated Circuits Symposium, 13-16, 2010 | 10 | 2010 |
| Systems and methods of element scrambling for compensation and calibration of analog-to-digital converter feedback JL Melanson, J Mehta, ST Hodapp US Patent 9,407,279, 2016 | 7 | 2016 |
| A low power and low quantization noise digital sigma-delta modulator for wireless transmitters VK Parikh, PT Balsara, O Eliezer, J Mehta 2007 IEEE International Symposium on Circuits and Systems, 3275-3278, 2007 | 6 | 2007 |
| Systems and methods for clock synchronization in a data acquisition system JL Melanson, RD Holley, J Mehta US Patent 10,033,390, 2018 | 5 | 2018 |
| A low area and low power digital band-pass sigma-delta modulator for wireless transmitters VK Parikh, PT Balsara, O Eliezer, J Mehta 2007 IEEE International Symposium on Circuits and Systems, 3279-3282, 2007 | 4 | 2007 |
| Mismatch considerations in an RF-DAC design for a digital polar EDGE transmitter J Mehta, RB Staszewski, G Feygin, O Eliezer, M Frechette, P Balsara 2011 IEEE International Symposium on Radio-Frequency Integration Technology …, 2011 | 3 | 2011 |
| Self-calibration of a power pre-amplifier in a digital polar transmitter J Mehta, I Bashir, V Zoicas, Y Wang, O Eliezer, K Waheed, M Entezari, ... 2010 IEEE Dallas Circuits and Systems Workshop, 1-4, 2010 | 3 | 2010 |
