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Henry Duwe
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Modular design of high-throughput, low-latency sorting units
A Farmahini-Farahani, HJ Duwe III, MJ Schulte, K Compton
IEEE Transactions on Computers 62 (7), 1389-1402, 2012
752012
Low-power, low-storage-overhead chipkill correct via multi-line error correction
X Jian, H Duwe, J Sartori, V Sridharan, R Kumar
Proceedings of the International Conference on High Performance Computing …, 2013
722013
Bespoke processors for applications with ultra-low area and power constraints
H Cherupalli, H Duwe, W Ye, R Kumar, J Sartori
Proceedings of the 44th Annual International Symposium on Computer …, 2017
352017
Approximate bitcoin mining
M Vilim, H Duwe, R Kumar
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
352016
Determining application-specific peak power and energy requirements for ultra-low-power processors
H Cherupalli, H Duwe, W Ye, R Kumar, J Sartori
ACM Transactions on Computer Systems (TOCS) 35 (3), 1-33, 2017
312017
Rescuing uncorrectable fault patterns in on-chip memories through error pattern transformation
H Duwe, X Jian, D Petrisko, R Kumar
ACM SIGARCH Computer Architecture News 44 (3), 634-644, 2016
282016
Correction prediction: Reducing error correction latency for on-chip memories
H Duwe, X Jian, R Kumar
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
272015
High performance, energy efficient chipkill correct memory with multidimensional parity
X Jian, J Sartori, H Duwe, R Kumar
IEEE Computer Architecture Letters 12 (2), 39-42, 2012
192012
Porting CMP benchmarks to GPUs
MD Sinclair, H Duwe, K Sankaralingam
University of Wisconsin-Madison Department of Computer Sciences, 2011
182011
Software-based gate-level information flow security for IoT systems
H Cherupalli, H Duwe, W Ye, R Kumar, J Sartori
Proceedings of the 50th Annual IEEE/ACM International Symposium on …, 2017
172017
Enabling effective module-oblivious power gating for embedded processors
H Cherupalli, H Duwe, W Ye, R Kumar, J Sartori
2017 IEEE International symposium on high performance computer architecture …, 2017
112017
Experimental study of lifecycle management protocols for batteryless intermittent communication
V Deep, ML Wymore, AA Aurandt, V Narayanan, S Fu, H Duwe, D Qiao
2021 IEEE 18th International Conference on Mobile Ad Hoc and Smart Systems …, 2021
102021
Harc: A heterogeneous array of redundant persistent clocks for batteryless, intermittently-powered systems
V Deep, V Narayanan, M Wymore, D Qiao, H Duwe
2020 IEEE Real-Time Systems Symposium (RTSS), 270-282, 2020
102020
Better-than-worst-case design: Progress and opportunities
J Cong, H Duwe, R Kumar, S Li
Journal of computer science and technology 29 (4), 656-663, 2014
72014
Markov chain algorithms: A template for building future robust low power systems
B Deka, AA Birklykke, H Duwe, VK Mansinghka, R Kumar
2013 Asilomar Conference on Signals, Systems and Computers, 118-125, 2013
72013
Lifecycle management protocols for batteryless, intermittent sensor nodes
ML Wymore, V Deep, V Narayanan, H Duwe, D Qiao
2020 IEEE 39th International Performance Computing and Communications …, 2020
62020
Cynapse: A low-power reconfigurable neural inference accelerator for spiking neural networks
S Saha, H Duwe, J Zambreno
Journal of Signal Processing Systems 92 (9), 907-929, 2020
52020
A unified framework for error correction in on-chip memories
F Sala, H Duwe, L Dolecek, R Kumar
2016 46th Annual IEEE/IFIP International Conference on Dependable Systems …, 2016
52016
Learning and professional development through integrated reflective activities in electrical and computer engineering courses
DT Rover, HJ Duwe, M Mina, ND Fila, PH Jones, LS Sleeth
2021 IEEE Frontiers in Education Conference (FIE), 1-9, 2021
42021
Constrained Conservative State Symbolic Co-analysis for Ultra-low-power Embedded Systems
S Hegde, S Sethumurugan, H Cherupalli, H Duwe, J Sartori
Proceedings of the 26th Asia and South Pacific Design Automation Conference …, 2021
32021
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Articles 1–20