| Efficient Reverse Converter Designs for the New 4-Moduli Sets and Based on New CRTs AS Molahosseini, K Navi, C Dadkhah, O Kavehei, S Timarchi IEEE Transactions on Circuits and Systems I: Regular Papers 57 (4), 823-835, 2009 | 180 | 2009 |
| Residue number systems: A new paradigm to datapath optimization for low-power and high-performance digital signal processing applications CH Chang, AS Molahosseini, AAE Zarandi, TF Tay IEEE circuits and systems magazine 15 (4), 26-44, 2015 | 176 | 2015 |
| Hunter–prey optimization: Algorithm and applications I Naruei, F Keynia, A Sabbagh Molahosseini Soft Computing 26 (3), 1279-1314, 2022 | 126 | 2022 |
| How to teach residue number system to computer scientists and engineers K Navi, AS Molahosseini, M Esmaeildoust IEEE Transactions on Education 54 (1), 156-163, 2010 | 124 | 2010 |
| Embedded systems design with special arithmetic and number systems AS Molahosseini, LS De Sousa, CH Chang Springer, 2017 | 93 | 2017 |
| Research challenges in next-generation residue number system architectures AS Molahosseini, S Sorouri, AAE Zarandi 2012 7th international conference on computer science & education (ICCSE …, 2012 | 70 | 2012 |
| Residue-to-binary conversion for general moduli sets based on approximate Chinese remainder theorem NI Chervyakov, AS Molahosseini, PA Lyakhov, MG Babenko, ... International journal of computer mathematics 94 (9), 1833-1849, 2017 | 63 | 2017 |
| Reverse converter design via parallel-prefix adders: Novel components, methodology, and implementations AAE Zarandi, AS Molahosseini, M Hosseinzadeh, S Sorouri, S Antao, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 23 (2), 374-378, 2014 | 41 | 2014 |
| New arithmetic residue to binary converters AS Molahosseini, K Navi IJCSES 1 (4), 296, 2007 | 40 | 2007 |
| A new residue to binary converter based on mixed-radix conversion AS Molahosseini, K Navi, MK Rafsanjani 2008 3rd International Conference on Information and Communication …, 2008 | 37 | 2008 |
| A new five-moduli set for efficient hardware implementation of the reverse converter AS Molahosseini, C Dadkhah, K Navi IEICE Electronics Express 6 (14), 1006-1012, 2009 | 36 | 2009 |
| An efficient architecture for designing reverse converters based on a general three-moduli set AS Molahosseini, K Navi, O Hashemipour, A Jalali journal of Systems Architecture 54 (10), 929-934, 2008 | 34 | 2008 |
| A reverse converter for the enhanced moduli set {2n-1, 2n+ 1, 22n, 22n+ 1-1} using CRT and MRC AS Molahosseini, K Navi 2010 IEEE Computer Society Annual Symposium on VLSI, 456-457, 2010 | 31 | 2010 |
| An improved reverse converter for the moduli set {2n-1, 2n, 2n+ 1, 2n+ 1-1} M Hosseinzadeh, AS Molahosseini, K Navi IEICE Electronics Express 5 (17), 672-677, 2008 | 31 | 2008 |
| Efficient modular adder designs based on thermometer and one-hot coding F Jafarzadehpour, AS Molahosseini, AAE Zarandi, L Sousa ieee transactions on very large scale integration (vlsi) systems 27 (9 …, 2019 | 27 | 2019 |
| A fault-tolerant architecture for internet-of-things based on software-defined networks K Bakhshi Kiadehi, AM Rahmani, A Sabbagh Molahosseini Telecommunication Systems 77, 155-169, 2021 | 25 | 2021 |
| A multifunctional unit for designing efficient RNS-based datapaths AS Molahosseini, AAE Zarandi, P Martins, L Sousa IEEE Access 5, 25972-25986, 2017 | 25 | 2017 |
| Efficient MRC-Based Residue to Binary Converters for the New Moduli Sets {22n, 2n -1, 2n+1 -1} and {22n, 2n -1, 2n-1 -1} AS Molahosseini, C Dadkhah, K Navi, M Eshghi IEICE transactions on information and systems 92 (9), 1628-1638, 2009 | 19 | 2009 |
| New energy‐efficient hybrid wide‐operand adder architecture F Jafarzadehpour, AS Molahosseini, AA Emrani Zarandi, L Sousa IET Circuits, Devices & Systems 13 (8), 1221-1231, 2019 | 18 | 2019 |
| A general reverse converter architecture with low complexity and high performance K Navi, M Esmaeildoust, AS Molahosseini IEICE TRANSACTIONS on Information and Systems 94 (2), 264-273, 2011 | 18 | 2011 |
