David A. Wood

Cited by

	All	Since 2016
Citations	23648	7059
h-index	65	34
i10-index	143	82

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Co-authors

Mark D. HillProfessor of Computer Sciences and ECE, University of Wisconsin-MadisonVerified email at cs.wisc.edu
James R LarusProfessor and Dean, EPFLVerified email at larusstone.org
Daniel J. SorinProfessor of ECE and Computer Science, Duke UniversityVerified email at ee.duke.edu
Milo M. K. MartinFormer Associate Professor, University of PennsylvaniaVerified email at cis.upenn.edu
Somayeh SardashtiUniversity of Wisconsin-MadisonVerified email at cs.wisc.edu
Babak FalsafiProfessor of Computer Science, EPFLVerified email at epfl.ch
Derek HowerQualcommVerified email at cs.wisc.edu
Randy KatzUniversity of California, BerkeleyVerified email at cs.Berkeley.edu
Alvin R. LebeckProfessor Computer Science and Electrical and Computer Engineering, Duke UniversityVerified email at cs.duke.edu
Jayaram BobbaIntel CorporationVerified email at intel.com
Michael SwiftProfessor of Computer Science, University of Wisconsin--MadisonVerified email at cs.wisc.edu
Muhammad Shoaib Bin AltafOracle CorpVerified email at oracle.com
Garth Alan GibsonPresident & CEO, Vector Institute; Consulting Professor of Computer Science, Carnegie MellonVerified email at vectorinstitute.ai
Arkaprava BasuAssistant Professor at Indian Institute of Science (IISc)Verified email at iisc.ac.in
Tushar KrishnaAssistant Professor, Georgia TechVerified email at ece.gatech.edu
Nathan BinkertAmazon Web ServicesVerified email at binkert.org
Leonard ShapiroEmeritus Professor of Computer Science, Portland State UniversityVerified email at cs.pdx.edu
David PattersonProfessor of Computer Science, UC BerkeleyVerified email at cs.berkeley.edu
Anastasia AilamakiProfessor of Computer and Communication Sciences. EPFLVerified email at epfl.ch
Manoj PlakalVerified email at cs.wisc.edu

David A. Wood

University of Wisconsin, Madison

Verified email at cs.wisc.edu - Homepage

Computer architecture


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The gem5 simulator N Binkert, B Beckmann, G Black, SK Reinhardt, A Saidi, A Basu, ... ACM SIGARCH computer architecture news 39 (2), 1-7, 2011	4304	2011
Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset MMK Martin, DJ Sorin, BM Beckmann, MR Marty, M Xu, AR Alameldeen, ... ACM SIGARCH Computer Architecture News 33 (4), 92-99, 2005	2000	2005
Implementation techniques for main memory database systems DJ DeWitt, RH Katz, F Olken, LD Shapiro, MR Stonebraker, DA Wood ACM SIGMOD Record 14 (2), 1-8, 1984	1188	1984
LogTM: Log-based transactional memory KE Moore, J Bobba, MJ Moravan, MD Hill, DA Wood Proceedings of the 12th International Symposium on High-Performance Computer …, 2006	920	2006
DBMSs on a modern processor: Where does time go? A Ailamaki, DJ DeWitt, MD Hill, DA Wood Proceedings of the International Conference on Very Large Data Bases, 266-277, 1999	694	1999
Tempest and Typhoon: User-level shared memory SK Reinhardt, JR Larus, DA Wood Proceedings of the 21st annual international symposium on Computer …, 1994	513	1994
The wisconsin wind tunnel: Virtual prototyping of parallel computers SK Reinhardt, MD Hill, JR Larus, AR Lebeck, JC Lewis, DA Wood Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and …, 1993	479	1993
Managing wire delay in large chip-multiprocessor caches BM Beckmann, DA Wood 37th International Symposium on Microarchitecture (MICRO-37'04), 319-330, 2004	476	2004
LogTM-SE: Decoupling hardware transactional memory from caches L Yen, J Bobba, MR Marty, KE Moore, H Volos, MD Hill, MM Swift, ... 2007 IEEE 13th International Symposium on High Performance Computer …, 2007	443	2007
A primer on memory consistency and cache coherence DJ Sorin, MD Hill, DA Wood Synthesis lectures on computer architecture 6 (3), 1-212, 2011	424	2011
SafetyNet: Improving the availability of shared memory multiprocessors with global checkpoint/recovery DJ Sorin, MMK Martin, MD Hill, DA Wood Proceedings 29th Annual International Symposium on Computer Architecture …, 2002	411	2002
Implementing a cache consistency protocol RH Katz, SJ Eggers, DA Wood, CL Perkins, RG Sheldon ACM SIGARCH Computer Architecture News 13 (3), 276-283, 1985	373	1985
Adaptive cache compression for high-performance processors AR Alameldeen, DA Wood Proceedings. 31st Annual International Symposium on Computer Architecture …, 2004	372	2004
Token coherence: Decoupling performance and correctness MMK Martin, MD Hill, DA Wood ACM SIGARCH Computer Architecture News 31 (2), 182-193, 2003	372	2003
Fine-grain access control for distributed shared memory I Schoinas, B Falsafi, AR Lebeck, SK Reinhardt, JR Larus, DA Wood Proceedings of the sixth international conference on Architectural support …, 1994	368	1994
Variability in architectural simulations of multi-threaded workloads AR Alameldeen, DA Wood The Ninth International Symposium on High-Performance Computer Architecture …, 2003	332	2003
Cache profiling and the SPEC benchmarks: A case study AR Lebeck, DA Wood Computer 27 (10), 15-26, 1994	319	1994
Performance pathologies in hardware transactional memory J Bobba, KE Moore, H Volos, L Yen, MD Hill, MM Swift, DA Wood ACM SIGARCH Computer Architecture News 35 (2), 81-91, 2007	312	2007
ASR: Adaptive selective replication for CMP caches BM Beckmann, MR Marty, DA Wood 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture …, 2006	290	2006
Frequent pattern compression: A significance-based compression scheme for L2 caches AR Alameldeen, DA Wood Dept. of Computer Sciences, University of Wisconsin-Madison, Tech. Rep, 2004	273	2004

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