Avinash Karanth
Avinash Karanth
Professor Ohio University
Verified email at - Homepage
Cited by
Cited by
iWISE: Inter-router wireless scalable express channels for network-on-chips (NoCs) architecture
D DiTomaso, A Kodi, S Kaya, D Matolak
2011 IEEE 19th annual symposium on high performance interconnects, 11-18, 2011
iDEAL: Inter-router dual-function energy and area-efficient links for network-on-chip (NoC) architectures
AK Kodi, A Sarathy, A Louri
2008 International Symposium on Computer Architecture, 241-250, 2008
Wireless networks-on-chips: architecture, wireless channel, and devices
DW Matolak, A Kodi, S Kaya, D Ditomaso, S Laha, W Rayess
IEEE Wireless Communications 19 (5), 58-65, 2012
A-winoc: Adaptive wireless network-on-chip architecture for chip multiprocessors
D DiTomaso, A Kodi, D Matolak, S Kaya, S Laha, W Rayess
IEEE Transactions on Parallel and Distributed Systems 26 (12), 3289-3302, 2014
A new frontier in ultralow power wireless links: Network-on-chip and chip-to-chip interconnects
S Laha, S Kaya, DW Matolak, W Rayess, D DiTomaso, A Kodi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2014
Channel modeling for wireless networks-on-chips
DW Matolak, S Kaya, A Kodi
IEEE Communications Magazine 51 (6), 180-186, 2013
Energy-efficient and bandwidth-reconfigurable photonic networks for high-performance computing (HPC) systems
AK Kodi, A Louri
IEEE journal of selected topics in Quantum Electronics 17 (2), 384-395, 2010
Design of a high-speed optical interconnect for scalable shared-memory multiprocessors
AK Kodi, A Louri
IEEE micro 25 (1), 41-49, 2005
Probe: Prediction-based optical bandwidth scaling for energy-efficient nocs
L Zhou, AK Kodi
2013 Seventh IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 1-8, 2013
Dynamic voltage and frequency scaling in NoCs with supervised and reinforcement learning techniques
Q Fettes, M Clark, R Bunescu, A Karanth, A Louri
IEEE Transactions on Computers 68 (3), 375-389, 2018
Dynamic reconfiguration of 3d photonic networks-on-chip for maximizing performance and improving fault tolerance
R Morris, AK Kodi, A Louri
2012 45th Annual IEEE/ACM International Symposium on Microarchitecture, 282-293, 2012
Mitigation of denial of service attack with hardware trojans in noc architectures
T Boraten, AK Kodi
2016 IEEE international parallel and distributed processing symposium (IPDPS …, 2016
QORE: A fault tolerant network-on-chip architecture with power-efficient quad-function channel (QFC) buffers
D DiTomaso, A Kodi, A Louri
2014 IEEE 20th international symposium on high performance computer …, 2014
Gcnax: A flexible and energy-efficient accelerator for graph convolutional neural networks
J Li, A Louri, A Karanth, R Bunescu
2021 IEEE International Symposium on High-Performance Computer Architecture …, 2021
Packet security with path sensitization for NoCs
T Boraten, AK Kodi
2016 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2016
Extending the performance and energy-efficiency of shared memory multicores with nanophotonic technology
R Morris, E Jolley, AK Kodi
IEEE Transactions on Parallel and Distributed Systems 25 (1), 83-92, 2013
Three-dimensional stacked nanophotonic network-on-chip architecture with minimal reconfiguration
RW Morris, AK Kodi, A Louri, RD Whaley
IEEE Transactions on Computers 63 (1), 243-255, 2012
Exploring the design of 64-and 256-core power efficient nanophotonic interconnect
R Morris, AK Kodi
IEEE Journal of Selected Topics in Quantum Electronics 16 (5), 1386-1393, 2010
Power-efficient and high-performance multi-level hybrid nanophotonic interconnect for multicores
RW Morris Jr, AK Kodi
2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 207-214, 2010
Monopoles loaded with 3-D-printed dielectrics for future wireless intrachip communications
J Wu, AK Kodi, S Kaya, A Louri, H Xin
IEEE Transactions on Antennas and Propagation 65 (12), 6838-6846, 2017
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