| Efficient hardware implementations of QTL cipher for RFID applications N Shrivastava, P Singh, B Acharya International Journal of High Performance Systems Architecture 9 (1), 1-10, 2020 | 12 | 2020 |
| Towards an optimal countermeasure for cache side-channel attacks N Shrivastava, SR Sarangi IEEE Embedded Systems Letters, 2022 | 7 | 2022 |
| A survey of hardware architectures for generative adversarial networks N Shrivastava, MA Hanif, S Mittal, SR Sarangi, M Shafique Journal of Systems Architecture 118, 102227, 2021 | 7 | 2021 |
| FPGA implementation of RECTANGLE block cipher architectures N Shrivastava, B Acharya International Journal of Innovative Technology and Exploring Engineering 8 …, 2019 | 4 | 2019 |
| Securator: A fast and secure neural processing unit N Shrivastava, SR Sarangi 2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023 | 3 | 2023 |
| Vlsi implementation of esf and qtl lightweight ciphers N Shrivastava, B Acharya, AS Raghuvanshi Proceedings of the Fourth International Conference on Microelectronics …, 2021 | 3 | 2021 |
| PredStereo: An Accurate Real-time Stereo Vision System D Moolchandani, N Shrivastava, A Kumar, SR Sarangi Proceedings of the IEEE/CVF Winter Conference on Applications of Computer …, 2022 | 2 | 2022 |
| A novel hardware architecture for rectangle block cipher N Shrivastava, P Singh, B Acharya Nanoelectronics, Circuits and Communication Systems: Proceeding of NCCS 2018 …, 2020 | 2 | 2020 |
| SceDL: A Simultaneous Compression and Encryption Scheme for Deep Learning Models N Shrivastava Authorea Preprints, 2023 | 1 | 2023 |
| PC-ILP: A Fast and Intuitive Method to Place Electric Vehicle Charging Stations in Smart Cities M Bose, BR Dutta, N Shrivastava, SR Sarangi Smart Cities 6 (6), 3060-3092, 2023 | | 2023 |
| SparseLock: Securing Neural Network Models in Deep Learning Accelerators N Shrivastava, SR Sarangi arXiv preprint arXiv:2311.02628, 2023 | | 2023 |
| SecOComp: A Fast and Secure Simultaneous Compression and Encryption Scheme N Shrivastava, SR Sarangi arXiv preprint arXiv:2306.06949, 2023 | | 2023 |
| Lightweight Hardware Architecture for Eight-Sided Fortress Cipher in FPGA N Shrivastava, B Acharya Advances in Data and Information Sciences: Proceedings of ICDIS 2019, 179-190, 2020 | | 2020 |
| Supplementary Material for PredStereo: An Accurate Real-Time Stereo Vision System D Moolchandani, N Shrivastava, A Kumar, SR Sarangi | | |
Smruti R. SarangiComputer Science, IIT DelhiVerified email at cse.iitd.ac.in
