| TLSync: support for multiple fast barriers using on-chip transmission lines J Oh, M Prvulovic, A Zajic ACM SIGARCH Computer Architecture News 39 (3), 105-116, 2011 | 56 | 2011 |
| LIME: A framework for debugging load imbalance in multi-threaded execution J Oh, CJ Hughes, G Venkataramani, M Prvulovic Proceedings of the 33rd International Conference on Software Engineering …, 2011 | 32 | 2011 |
| Traffic steering between a low-latency unswitched TL ring and a high-throughput switched on-chip interconnect J Oh, A Zajic, M Prvulovic Proceedings of the 22nd International conference on Parallel Architectures …, 2013 | 15 | 2013 |
| Efficient hardware and software assist for many-core performance J Oh Georgia Institute of Technology, 2013 | | 2013 |
| Performance debugging support for many-core processors project M Prvulovic, J Oh, S Park Georgia Institute of Technology, 2012 | | 2012 |
