Monir Zaman

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Yiorgos MakrisThe University of Texas at DallasVerified email at utdallas.edu
Ali AhmadiPhD student, University of Texas at DallasVerified email at utdallas.edu
Jeyavijayan (JV) RajendranAssociate Professor of Electrical and Computer Engineering, Texas A&M UniversityVerified email at tamu.edu
Ozgur SinanogluProfessor of Electrical and Computer Engineering, New York University Abu DhabiVerified email at nyu.edu
Mustafa M. ShihabHardware Architect at Intel CorporationVerified email at intel.com
Ayse K CoskunProfessor in ECE Department, Boston UniversityVerified email at bu.edu

Monir Zaman

Verified email at utdallas.edu


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Decoy: Deflection-driven hls-based computation partitioning for obfuscating intellectual property J Chen, M Zaman, Y Makris, RDS Blanton, S Mitra, BC Schafer 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020	25	2020
Workload characterization and prediction: A pathway to reliable multi-core systems M Zaman, A Ahmadi, Y Makris 2015 IEEE 21st International On-Line Testing Symposium (IOLTS), 116-121, 2015	19	2015
Towards provably-secure performance locking M Zaman, A Sengupta, D Liu, O Sinanoglu, Y Makris, JJV Rajendran 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018	18	2018
Hunting security bugs in SoC designs: Lessons learned MM Bidmeshki, Y Zhang, M Zaman, L Zhou, Y Makris IEEE Design & Test 38 (1), 22-29, 2020	6	2020
CAPE: A cross-layer framework for accurate microprocessor power estimation M Zaman, MM Shihab, AK Coskun, Y Makris Integration 68, 87-98, 2019	2	2019
Towards a cross-layer framework for accurate power modeling of microprocessor designs M Zaman, MM Shihab, AK Coskun, Y Makris 2018 28th International Symposium on Power and Timing Modeling, Optimization …, 2018	1	2018
Design Space Exploration for Secure and Power-Efficient Microprocessor Designs MM Zaman The University of Texas at Dallas, 2019		2019
Reliability Enhancement of Multi-Core Processors using Machine-Learning Techniques M Zaman, A Ahmadi, Y Makris

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