| Design & Implementation of High Speed and Low Power PLL Using GPDK 45 nm Technology NA Badiger, S Iyer Journal of The Institution of Engineers (India): Series B 105 (2), 239-249, 2024 | 2 | 2024 |
| Design of Phase Frequency Detector for Low Power PLL Using GPDK 45nm Technology NA Badiger, S Iyer 2023 International Conference on Network, Multimedia and Information …, 2023 | 1 | 2023 |
| Power and Delay Analysis of a CMOS Inverter NA Badiger, S Iyer, S Gejji 2023 IEEE International Conference on Data Science and Network Security …, 2023 | 1 | 2023 |
| FPGA Implementation of Image Enhancement using Verilog HDL NA Badiger, MJ Muragod, MP Pattar, M Priyanka algorithms 3 (12), 2014 | 1 | 2014 |
| Design and Analysis of 6T SRAM using 45 nm gpdk Technology AK Prof. Narayan A.Badiger, Sneha Biradar International Conference on Recent Advances in Science Engineering …, 2024 | | 2024 |
| Intelligent Night Surveillance Using Drone NAB Sainand Prabhu 1, Swati Hakare 2, Trupti Hawaldar 3, Vikas Madanashetti 4 International Journal of Research Publication and Reviews 4 (5), 8, 2023 | | 2023 |
| Efficient Multi-Object Detecting Assistive System for Visually Impaired People NA Badiger, MRB Nagarali, MS Naik, MR Koppad | | 2022 |
| GSM Based Needleless Blood Glucose Monitoring System NA Badiger, P Borgave, NV Bevinakoppamath, V Chandrashekhar, ... | | 2020 |
| Lecture notes on Microwaves & Antenna P Narayan AB https://lecturenotes.in/notes/27785-antennas-and-microwave-engineering …, 2017 | | 2017 |
| A Survey on Leakage Power Reduction Techniques MNA BADIGER, DRM KULKARNI International Journal of Emerging Technology in Computer Science …, 2015 | | 2015 |
SRIDHAR IYERKLE Technological University Dr. MSSCETVerified email at klescet.ac.in
SRIDHAR IYERKLE Technological University Dr. MSSCETVerified email at klescet.ac.in