| ISPD 2018 initial detailed routing contest and benchmarks S Mantik, G Posser, WK Chow, Y Ding, WH Liu Proceedings of the 2018 International Symposium on Physical Design, 140-143, 2018 | 65 | 2018 |
| Pin accessibility-driven detailed placement refinement Y Ding, C Chu, WK Mak Proceedings of the 2017 ACM on International Symposium on Physical Design …, 2017 | 50 | 2017 |
| Throughput optimization for SADP and e-beam based manufacturing of 1D layout Y Ding, C Chu, WK Mak Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 44 | 2014 |
| ISPD 2019 initial detailed routing contest and benchmark with advanced routing rules WH Liu, S Mantik, WK Chow, Y Ding, A Farshidi, G Posser Proceedings of the 2019 International Symposium on Physical Design, 147-151, 2019 | 39 | 2019 |
| Capturing cognitive fingerprints from keystroke dynamics JM Chang, CC Fang, KH Ho, N Kelly, PY Wu, Y Ding, C Chu, S Gilbert, ... IT Professional 15 (4), 24-28, 2013 | 34 | 2013 |
| Detailed routing for spacer-is-metal type self-aligned double/quadruple patterning lithography Y Ding, C Chu, WK Mak Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 16 | 2015 |
| Self-aligned double patterning lithography aware detailed routing with color preassignment Y Ding, C Chu, WK Mak IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2016 | 11 | 2016 |
| Self-aligned double patterning-aware detailed routing with double via insertion and via manufacturability consideration Y Ding, C Chu, WK Mak Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016 | 11 | 2016 |
| Study on the current-sharing control system of the TF power supply for a superconducting Tokamak Z Zhu, Y Zhu, R Huang, P Fu, Y Ding Plasma Science and Technology 14 (10), 941, 2012 | 4 | 2012 |
| An efficient shift invariant rasterization algorithm for all-angle mask patterns in ILT Y Ding, C Chu, X Zhou Proceedings of the 52nd Annual Design Automation Conference, 1-6, 2015 | 3 | 2015 |
| Machine-learning based clustering for clock tree synthesis B Jiang, N Viswanathan, Z Li, YX Ding US Patent 11,645,441, 2023 | 2 | 2023 |
| Circuit design routing using multi-panel track assignment YX Ding, MC Yildiz US Patent 10,706,201, 2020 | 2 | 2020 |
| Systems and methods for routing track assignment YX Ding, Z Li, WH Liu US Patent 10,509,878, 2019 | 2 | 2019 |
| Pruning of buffering candidates for improved efficiency of evaluation YX Ding, Z Li, JR Gao, SED Lin US Patent 11,520,959, 2022 | 1 | 2022 |
| Layer assignment technique to improve timing in integrated circuit design YX Ding, JR Gao, Z Li US Patent 10,860,764, 2020 | 1 | 2020 |
| Placement of cells in a multi-level routing tree WR Reece, YX Ding, TA Newton, CJ Alpert, Z Li US Patent 10,402,533, 2019 | 1 | 2019 |
| Driver resizing using a transition-based pin capacitance increase margin JR Gao, YX Ding, Z Li US Patent 11,868,695, 2024 | | 2024 |
| Pruning redundant buffering solutions using fast timing models JR Gao, YX Ding, Z Li US Patent 11,675,956, 2023 | | 2023 |
| Grouping cells in cell library based on clustering Z Li, N Viswanathan, V Bandeira, YX Ding US Patent 11,625,525, 2023 | | 2023 |
| Switching power aware driver resizing by considering net activity in buffering algorithm YX Ding, Z Li, JR Gao US Patent 11,526,650, 2022 | | 2022 |
Chris ChuIowa State UniversityVerified email at iastate.edu
Chris ChuIowa State UniversityVerified email at iastate.edu