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Anup Holey
Anup Holey
Verified email at nvidia.com
Title
Cited by
Cited by
Year
Managing shared last-level cache in a heterogeneous multicore processor
V Mekkat, A Holey, PC Yew, A Zhai
Proceedings of the 22nd international conference on Parallel architectures …, 2013
1162013
Lightweight software transactions on GPUs
A Holey, A Zhai
2014 43rd International Conference on Parallel Processing, 461-470, 2014
372014
Energy-efficient non-minimal path on-chip interconnection network for heterogeneous systems
J Yin, P Zhou, A Holey, SS Sapatnekar, A Zhai
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
282012
HAccRG: Hardware-accelerated data race detection in GPUs
A Holey, V Mekkat, A Zhai
2013 42nd International Conference on Parallel Processing, 60-69, 2013
212013
Enhancing GPU Programmability and Correctness Through Transactional Execution
AP Holey
University of Minnesota, 2015
172015
Accelerating data race detection utilizing on-chip data-parallel cores
V Mekkat, A Holey, A Zhai
Runtime Verification: 4th International Conference, RV 2013, Rennes, France …, 2013
142013
Performance-energy considerations for shared cache management in a heterogeneous multicore processor
A Holey, V Mekkat, PC Yew, A Zhai
ACM Transactions on Architecture and Code Optimization (TACO) 12 (1), 1-29, 2015
122015
Trans-fw: Short circuiting page table walk in multi-gpu systems via remote forwarding
B Li, J Yin, A Holey, Y Zhang, J Yang, X Tang
2023 IEEE International Symposium on High-Performance Computer Architecture …, 2023
32023
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