| Efficient integer DCT architectures for HEVC PK Meher, SY Park, BK Mohanty, KS Lim, C Yeo IEEE Transactions on Circuits and systems for Video Technology 24 (1), 168-178, 2013 | 239 | 2013 |
| Efficient FPGA and ASIC realizations of a DA-based reconfigurable FIR digital filter SY Park, PK Meher IEEE Transactions on Circuits and Systems II: Express Briefs 61 (7), 511-515, 2014 | 209 | 2014 |
| Low-power, high-throughput, and low-area adaptive FIR filter based on distributed arithmetic SY Park, PK Meher IEEE Transactions on Circuits and Systems II: Express Briefs 60 (6), 346-350, 2013 | 140 | 2013 |
| Critical-path analysis and low-complexity implementation of the LMS adaptive algorithm PK Meher, SY Park IEEE Transactions on Circuits and Systems I: Regular Papers 61 (3), 778-788, 2013 | 98 | 2013 |
| High-throughput pipelined realization of adaptive FIR filter based on distributed arithmetic PK Meher, SY Park 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 428-433, 2011 | 86 | 2011 |
| Area-delay-power efficient fixed-point LMS adaptive filter with low adaptation-delay PK Meher, SY Park IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (2), 362-371, 2013 | 85 | 2013 |
| CORDIC designs for fixed angle of rotation PK Meher, SY Park IEEE transactions on very large scale integration (VLSI) systems 21 (2), 217-228, 2012 | 81 | 2012 |
| Fixed-point error analysis of CORDIC processor based on the variance propagation formula SY Park, NI Cho Circuits and Systems I: Regular Papers, IEEE Transactions on 51 (3), 573-584, 2004 | 79* | 2004 |
| Low adaptation-delay LMS adaptive filter part-II: An optimized architecture PK Meher, SY Park 2011 IEEE 54th International Midwest Symposium on Circuits and Systems …, 2011 | 45 | 2011 |
| Low adaptation-delay LMS adaptive filter part-I: Introducing a novel multiplication cell PK Meher, SY Park 2011 IEEE 54th International Midwest Symposium on Circuits and Systems …, 2011 | 43 | 2011 |
| Fixed-point analysis and parameter selections of MSR-CORDIC with applications to FFT designs SY Park, YJ Yu IEEE Transactions on Signal Processing 60 (12), 6245-6256, 2012 | 40 | 2012 |
| Design of signed powers-of-two coefficient perfect reconstruction QMF Bank using CORDIC algorithms SY Park, NI Cho Circuits and Systems I: Regular Papers, IEEE Transactions on 53 (6), 1254-1265, 2006 | 39 | 2006 |
| Design of 2K/4K/8K-point FFT processor based on CORDIC algorithm in OFDM receiver SY Park, NI Cho, SU Lee, K Kim, J Oh 2001 IEEE Pacific Rim Conference on Communications, Computers and Signal …, 2001 | 37 | 2001 |
| Flexible integer DCT architectures for HEVC SY Park, PK Meher 2013 IEEE International Symposium on Circuits and Systems (ISCAS), 1376-1379, 2013 | 32 | 2013 |
| Design of multiplierless lattice QMF: Structure and algorithm development SY Park, NI Cho IEEE Transactions on Circuits and Systems II: Express Briefs 55 (2), 173-177, 2008 | 25 | 2008 |
| Sparse-iteration 4D CORDIC algorithms for multiplying quaternions M Parfieniuk, SY Park IEEE Transactions on computers 65 (9), 2859-2871, 2015 | 17 | 2015 |
| A novel dual separate paths (DSP) algorithm providing fault-tolerant communication for wireless sensor networks NX Tien, S Kim, JM Rhee, SY Park Sensors 17 (8), 1699, 2017 | 16 | 2017 |
| Design of cascaded CORDIC based on precise analysis of critical path PK Meher, SY Park Electronics 8 (4), 382, 2019 | 14 | 2019 |
| Segmentation based disparity estimation using color and depth information SY Park, SH Lee, NI Cho 2004 International Conference on Image Processing, 2004. ICIP'04. 5, 3275-3278, 2004 | 13 | 2004 |
| Design of very high-speed pipeline FIR filter through precise critical path analysis SM Cho, PK Meher, LTN Trung, HJ Cho, SY Park ieee access 9, 34722-34735, 2021 | 12 | 2021 |
Pramod Kumar MeherC. V. Raman Global University, Bhubaneswar, IndiaVerified email at sandhaanlabs.in
