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Jieqiong Du
Jieqiong Du
Verified email at g.ucla.edu
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Year
An analog neural network computing engine using CMOS-compatible charge-trap-transistor (CTT)
Y Du, L Du, X Gu, J Du, XS Wang, B Hu, M Jiang, X Chen, SS Iyer, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
482018
A 16-Gb/s 14.7-mW tri-band cognitive serial link transmitter with forwarded clock to enable PAM-16/256-QAM and channel response detection
Y Du, WH Cho, PT Huang, Y Li, CH Wong, J Du, Y Kim, B Hu, L Du, C Liu, ...
IEEE Journal of Solid-State Circuits 52 (4), 1111-1122, 2016
482016
High-throughput lossless compression on tightly coupled CPU-FPGA platforms
W Qiao, J Du, Z Fang, M Lo, MCF Chang, J Cong
2018 IEEE 26th Annual International Symposium on Field-Programmable Custom …, 2018
422018
10.2 A 38mW 40Gb/s 4-lane tri-band PAM-4/16-QAM transceiver in 28nm CMOS for high-speed Memory interface
WH Cho, Y Li, Y Du, CH Wong, J Du, PT Huang, SJ Lee, HN Chen, ...
2016 IEEE International Solid-State Circuits Conference (ISSCC), 184-185, 2016
252016
Carrier synchronisation for multiband RF interconnect (MRFI) to facilitate chip‐to‐chip wireline communication
Y Li, WH Cho, Y Du, J Du, PT Huang, SJ Lee, MCF Chang
Electronics Letters 52 (7), 535-537, 2016
172016
AK/Ka/V triband single-signal-path receiver with variable-gain low-noise amplifier and constant-gain phase shifter in 28-nm CMOS
CJ Liang, Y Zhang, CW Chiang, R Huang, J Zhou, J Du, KA Wen, ...
IEEE Transactions on Microwave Theory and Techniques 69 (5), 2579-2593, 2021
92021
A 2-GS/s 8-bit ADC featuring virtual-ground sampling interleaved architecture in 28-nm CMOS
XS Wang, X Jin, J Du, Y Li, Y Du, CH Wong, YC Kuan, CH Chan, ...
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (11), 1534-1538, 2017
82017
A silicon-based closed-loop 256-Pixel near-field capacitive sensing array with 3-ppm sensitivity and selectable frequency shift gain
J Zhou, CJ Liang, C Chen, J Du, R Huang, R Al Hadi, JCM Hwang, ...
2020 IEEE/MTT-S International Microwave Symposium (IMS), 464-467, 2020
32020
A compact single-ended dual-band receiver with crosstalk and ISI reductions for high-density I/O interfaces
J Du, J Zhou, XS Wang, CH Wong, HN Chen, CP Jou, MCF Chang
2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 231-234, 2019
32019
An 8.8-GS/s 8b time-interleaved SAR ADC with 50-dB SFDR using complementary dual-loop-assisted buffers in 28nm CMOS
XS Wang, CH Chan, J Du, CH Wong, Y Li, Y Du, YC Kuan, B Hu, ...
2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 88-91, 2018
32018
Limitations and Implementation Strategies of Interstage Matching in a 6-W, 28-38-GHz GaN Power Amplifier MMIC
CJ Liang, Y Zhang, CW Chiang, R Huang, J Zhou, J Du, KA Wen, ...
IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES 69 (5), 2579-2593, 2021
2021
A 28-mW 32-Gb/s/pin 16-QAM Single-Ended Transceiver for High-Speed Memory Interface
J Du, J Zhou, CJ Liang, B Hu, Y Du, MCF Chang
2020 IEEE Symposium on VLSI Circuits, 1-2, 2020
2020
A 7.5-mW 10-Gb/s 16-QAM wireline transceiver with carrier synchronization and threshold calibration for mobile inter-chip communications in 16-nm FinFET
J Du, CH Wong, YH Tu, WH Cho, Y Li, Y Du, PT Huang, SJ Lee, ...
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip …, 2019
2019
Design of Energy-Efficient Single-Ended Frequency-Division Multiplexing Wireline Transceivers
J Du
UCLA, 2019
2019
Multiband Radio Frequency Interconnect (MRFI) Technology For Next Generation Mobile/Airborne Computing Systems
MCF Chang, WH Cho, J Du, Y Du, SJ Lee, Y Li, CH Wong, ...
2017
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Articles 1–15