| TP-GNN: A graph neural network framework for tier partitioning in monolithic 3D ICs YC Lu, SSK Pentapati, L Zhu, K Samadi, SK Lim 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 47 | 2020 |
| The law of attraction: Affinity-aware placement optimization using graph neural networks YC Lu, S Pentapati, SK Lim Proceedings of the 2021 International Symposium on Physical Design, 7-14, 2021 | 26 | 2021 |
| Macro-3D: A physical design methodology for face-to-face-stacked heterogeneous 3D ICs L Bamberg, A García-Ortiz, L Zhu, S Pentapati, SK Lim 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 37-42, 2020 | 21 | 2020 |
| Antiferroelectric negative capacitance from a structural phase transition in zirconia M Hoffmann, Z Wang, N Tasneem, A Zubair, PV Ravindran, M Tian, ... Nature communications 13 (1), 1228, 2022 | 18 | 2022 |
| Pin-3D: A physical synthesis and post-layout optimization flow for heterogeneous monolithic 3D ICs SSK Pentapati, K Chang, V Gerousis, R Sengupta, SK Lim Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 16 | 2020 |
| A logic-on-memory processor-system design with monolithic 3-D technology S Pentapati, L Zhu, L Bamberg, A García-Ortiz, SK Lim IEEE Micro 39 (6), 38-45, 2019 | 14 | 2019 |
| VLSI placement optimization using graph neural networks YC Lu, S Pentapati, SK Lim Proceedings of the 34th Advances in Neural Information Processing Systems …, 2020 | 13 | 2020 |
| A general framework for VLSI tool parameter optimization with deep reinforcement learning A Agnesina, S Pentapati, SK Lim NeurIPS 2020 Workshop on Machine Learning for Systems, 2020 | 12 | 2020 |
| A fast learning-driven signoff power optimization framework YC Lu, S Nath, SSK Pentapati, SK Lim Proceedings of the 39th International Conference on Computer-Aided Design, 1-9, 2020 | 10 | 2020 |
| Snap-3d: A constrained placement-driven physical design methodology for face-to-face-bonded 3d ics P Vanna-Iampikul, C Shao, YC Lu, S Pentapati, SK Lim Proceedings of the 2021 International Symposium on Physical Design, 39-46, 2021 | 8 | 2021 |
| Cross-domain optimization of ferroelectric parameters for negative capacitance transistors—Part I: Constant supply voltage S Pentapati, R Perumal, S Khandelwal, M Hoffmann, SK Lim, AI Khan IEEE Transactions on Electron Devices 67 (1), 365-370, 2019 | 8 | 2019 |
| High-performance logic-on-memory monolithic 3-D IC designs for Arm Cortex-A processors L Zhu, L Bamberg, SSK Pentapati, K Chang, F Catthoor, D Milojevic, ... IEEE Transactions on Very Large Scale Integration (VLSI) Systems 29 (6 …, 2021 | 5 | 2021 |
| Modeling and benchmarking back end of the line technologies on circuit designs at advanced nodes V Huang, J Kim, S Pentapati, SK Lim, A Naeemi 2020 IEEE International Interconnect Technology Conference (IITC), 37-39, 2020 | 5 | 2020 |
| Road to high-performance 3D ICs: Performance optimization methodologies for monolithic 3D ICs K Chang, S Pentapati, DE Shim, SK Lim Proceedings of the International Symposium on Low Power Electronics and …, 2018 | 5 | 2018 |
| ML-based wire rc prediction in monolithic 3d ics with an application to full-chip optimization SSK Pentapati, BW Ku, SK Lim Proceedings of the 2021 International Symposium on Physical Design, 75-82, 2021 | 4 | 2021 |
| Optimal ferroelectric parameters for negative capacitance field-effect transistors based on full-chip implementations—Part II: Scaling of the supply voltage S Pentapati, R Perumal, S Khandelwal, AI Khan, SK Lim IEEE Transactions on Electron Devices 67 (1), 371-376, 2019 | 4 | 2019 |
| Metal Layer Sharing: A Routing Optimization Technique for Monolithic 3D ICs S Pentapati, SK Lim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30 (9 …, 2022 | 3 | 2022 |
| Logic Monolithic 3D ICs: PPA Benefits and EDA Tools Necessary SSK Pentapati, DE Shim, SK Lim Proceedings of the 2019 on Great Lakes Symposium on VLSI, 445-450, 2019 | 3 | 2019 |
| A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs YC Lu, S Pentapati, L Zhu, G Murali, K Samadi, SK Lim IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2021 | 2 | 2021 |
| Heterogeneous monolithic 3D ICs: EDA solutions, and power, performance, cost tradeoffs SSK Pentapati, SK Lim 2021 58th ACM/IEEE Design Automation Conference (DAC), 925-930, 2021 | 2 | 2021 |
Sung Kyu LimProfessor, Georgia Institute of TechnologyVerified email at ece.gatech.edu
