| Comparison of combinational and sequential error rates for a deep submicron process NN Mahatme, S Jagannathan, TD Loveless, LW Massengill, BL Bhuva, ... IEEE Transactions on Nuclear Science 58 (6), 2719-2725, 2011 | 188 | 2011 |
| Neutron-and proton-induced single event upsets for D-and DICE-flip/flop designs at a 40 nm technology node TD Loveless, S Jagannathan, T Reece, J Chetia, BL Bhuva, MW McCurdy, ... IEEE Transactions on Nuclear Science 58 (3), 1008-1014, 2011 | 174 | 2011 |
| Single-event performance and layout optimization of flip-flops in a 28-nm bulk technology K Lilja, M Bounasser, SJ Wen, R Wong, J Holst, N Gaspard, ... IEEE Transactions on Nuclear Science 4 (60), 2782-2788, 2013 | 109 | 2013 |
| Impact of technology scaling on the combinational logic soft error rate NN Mahatme, NJ Gaspard, T Assis, S Jagannathan, I Chatterjee, ... Reliability Physics Symposium, 2014 IEEE International, 5F. 2.1-5F. 2.6, 2014 | 69 | 2014 |
| Independent measurement of SET pulse widths from N-hits and P-hits in 65-nm CMOS S Jagannathan, MJ Gadlage, BL Bhuva, RD Schrimpf, B Narasimham, ... IEEE Transactions on Nuclear Science 57 (6), 3386-3391, 2010 | 68 | 2010 |
| Single-event tolerant flip-flop design in 40-nm bulk CMOS technology S Jagannathan, TD Loveless, BL Bhuva, SJ Wen, R Wong, M Sachdev, ... IEEE Transactions on Nuclear Science 58 (6), 3033-3037, 2011 | 64 | 2011 |
| Frequency dependence of alpha-particle induced soft error rates of flip-flops in 40-nm CMOS technology S Jagannathan, TD Loveless, BL Bhuva, NJ Gaspard, N Mahatme, ... IEEE Transactions on Nuclear Science 59 (6), 2796-2802, 2012 | 62 | 2012 |
| On-chip measurement of single-event transients in a 45 nm silicon-on-insulator technology TD Loveless, JS Kauppila, S Jagannathan, DR Ball, JD Rowe, ... IEEE Transactions on Nuclear Science 59 (6), 2748-2755, 2012 | 57 | 2012 |
| Impact of supply voltage and frequency on the soft error rate of logic circuits NN Mahatme, NJ Gaspard, S Jagannathan, TD Loveless, BL Bhuva, ... Nuclear Science, IEEE Transactions on 60 (6), 4200-4206, 2013 | 56 | 2013 |
| Performance, metastability, and soft-error robustness trade-offs for flip-flops in 40 nm CMOS D Rennie, D Li, M Sachdev, BL Bhuva, S Jagannathan, SJ Wen, R Wong IEEE Transactions on Circuits and Systems I: Regular Papers 59 (8), 1626-1634, 2012 | 55 | 2012 |
| Technology scaling comparison of flip-flop heavy-ion single-event upset cross sections NJ Gaspard, S Jagannathan, ZJ Diggins, MP King, SJ Wen, R Wong, ... Nuclear Science, IEEE Transactions on 60 (6), 4368-4373, 2013 | 54 | 2013 |
| Estimation of hardened flip-flop neutron soft error rates using SRAM multiple-cell upset data in bulk CMOS N Gaspard, S Jagannathan, Z Diggins, M McCurdy, TD Loveless, ... Reliability Physics Symposium (IRPS), 2013 IEEE International, SE. 6.1-SE. 6.5, 2013 | 39 | 2013 |
| Circuit-level layout-aware single-event sensitive-area analysis of 40-nm bulk CMOS flip-flops using compact modeling JS Kauppila, TD Haeffner, DR Ball, AV Kauppila, TD Loveless, ... IEEE Transactions on Nuclear Science 58 (6), 2680-2686, 2011 | 37 | 2011 |
| Effect of Device Variants in 32 nm and 45 nm SOI on SET Pulse Distributions JA Maharrey, RC Quinn, TD Loveless, JS Kauppila, S Jagannathan, ... Nuclear Science, IEEE Transactions on 60 (6), 4399-4404, 2013 | 33 | 2013 |
| Temperature dependence of soft error rate in flip-flop designs S Jagannathan, Z Diggins, N Mahatme, TD Loveless, BL Bhuva, SJ Wen, ... 2012 IEEE International Reliability Physics Symposium (IRPS), SE. 2.1-SE. 2.6, 2012 | 33 | 2012 |
| Sensitivity of high-frequency RF circuits to total ionizing dose degradation S Jagannathan, TD Loveless, EX Zhang, DM Fleetwood, RD Schrimpf, ... Nuclear Science, IEEE Transactions on 60 (6), 4498-4504, 2013 | 25 | 2013 |
| SRAM based physically unclonable function and method for generating a PUF response NN Mahatme, S Jagannathan, A Hoefler US Patent 9,947,391, 2018 | 24 | 2018 |
| Single-Event Transient Induced Harmonic Errors in Digitally Controlled Ring Oscillators YP Chen, TD Loveless, P Maillard, NJ Gaspard, S Jagannathan, ... Nuclear Science, IEEE Transactions on 61 (6), 3163-3170, 2014 | 21 | 2014 |
| Neutron-and alpha-particle induced soft-error rates for flip flops at a 40 nm technology node S Jagannathan, TD Loveless, Z Diggins, BL Bhuva, SJ Wen, R Wong, ... 2011 International Reliability Physics Symposium, SE. 5.1-SE. 5.5, 2011 | 21 | 2011 |
| Combined effects of total ionizing dose and temperature on a k-band quadrature LC-tank VCO in a 32 nm CMOS SOI technology TD Loveless, S Jagannathan, EX Zhang, DM Fleetwood, JS Kauppila, ... IEEE Transactions on Nuclear Science 64 (1), 204-211, 2016 | 19 | 2016 |
Bharat BhuvaVanderbilt UniversityVerified email at vanderbilt.edu
