Jackey Z. Yan
Jackey Z. Yan
Cadence Design Systems
Verified email at iastate.edu - Homepage
Title
Cited by
Cited by
Year
DeFer: Deferred Decision Making Enabled Fixed-Outline Floorplanning Algorithm
JZ Yan, C Chu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010
712010
Handling complexities in modern large-scale mixed-size placement
JZ Yan, N Viswanathan, C Chu
Proceedings of the 46th Annual Design Automation Conference, 436-441, 2009
382009
DeFer: deferred decision making enabled fixed-outline floorplanner
JZ Yan, C Chu
Design Automation Conference, 2008. DAC 2008. 45th ACM/IEEE, 161-166, 2008
352008
Safechoice: a novel approach to hypergraph clustering for wirelength-driven placement
JZ Yan, C Chu, WK Mak
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
222011
Experiments in attacking FPGA-based embedded systems using differential power analysis
S Sun, Z Yan, J Zambreno
Electro/Information Technology, 2008. EIT 2008. IEEE International …, 2008
222008
SDS: an optimal slack-driven block shaping algorithm for fixed-outline floorplanning
JZ Yan, C Chu
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2013
172013
SafeChoice: a novel clustering algorithm for wirelength-driven placement
JZ Yan, C Chu, WK Mak
Proceedings of the 19th international symposium on Physical design, 185-192, 2010
162010
An effective floorplan-guided placement algorithm for large-scale mixed-size designs
JZ Yan, N Viswanathan, C Chu
ACM Transactions on Design Automation of Electronic Systems (TODAES) 19 (3 …, 2014
62014
Demonstrable differential power analysis attacks on real-world FPGA-based embedded systems
S Sun, Z Yan, J Zambreno
Integrated Computer-Aided Engineering 16 (2), 119-130, 2009
62009
Floorplan-guided placement for large-scale mixed-size designs
Z Yan
IOWA STATE UNIVERSITY, 2012
2012
The system can't perform the operation now. Try again later.
Articles 1–10