James Laudon
Title
Cited by
Cited by
Year
In-datacenter performance analysis of a tensor processing unit
NP Jouppi, C Young, N Patil, D Patterson, G Agrawal, R Bajwa, S Bates, ...
2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture …, 2017
18532017
Memory consistency and event ordering in scalable shared-memory multiprocessors
K Gharachorloo, D Lenoski, J Laudon, P Gibbons, A Gupta, J Hennessy
[1990] Proceedings. The 17th Annual International Symposium on Computer …, 1990
16621990
The stanford dash multiprocessor
D Lenoski, J Laudon, K Gharachorloo, WD Weber, A Gupta, J Hennessy, ...
Computer 25 (3), 63-79, 1992
13721992
The directory-based cache coherence protocol for the DASH multiprocessor
D Lenoski, J Laudon, K Gharachorloo, A Gupta, J Hennessy
[1990] Proceedings. The 17th Annual International Symposium on Computer …, 1990
9271990
Fair queuing memory systems
KJ Nesbit, N Aggarwal, J Laudon, JE Smith
Proceedings of the 39th Annual IEEE/ACM international Symposium on …, 2006
4072006
The DASH prototype: Logic overhead and performance
D Lenoski, J Laudon, T Joe, D Nakahira, L Stevens, A Gupta, J Hennessy
IEEE Transactions on Parallel and Distributed Systems 4 (1), 41-61, 1993
2561993
The DASH prototype: Implementation and performance
D Lenoski, J Laudon, T Joe, D Nakahira, L Stevens, A Gupta, J Hennessy
[1992] Proceedings the 19th Annual International Symposium on Computer …, 1992
2541992
Virtual private caches
KJ Nesbit, J Laudon, JE Smith
Proceedings of the 34th annual international symposium on Computer …, 2007
2042007
Maximizing CMP throughput with mediocre cores
JD Davis, J Laudon, K Olukotun
14th International Conference on Parallel Architectures and Compilation …, 2005
1522005
Interleaving: A multithreading technique targeting multiprocessors and workstations
J Laudon, A Gupta, M Horowitz
ACM SIGPLAN Notices 29 (11), 308-318, 1994
1501994
High memory capacity DIMM with data and state memory
JP Laudon, DE Lenoski, J Manton, ME Anderson
US Patent 6,049,476, 2000
1352000
Chip multiprocessor architecture: techniques to improve throughput and latency
K Olukotun, L Hammond, J Laudon
Synthesis Lectures on Computer Architecture 2 (1), 1-145, 2007
1252007
Directory-based coherence protocol allowing efficient dropping of clean-exclusive data
JP Laudon
US Patent 5,680,576, 1997
841997
Apparatus and method for profiling system events in a fine grain multi-threaded multi-core processor
N Kosche, JP Laudon, AR Talcott, S Patel, F Sajjadian
US Patent 8,762,951, 2014
772014
Performance/watt: the new server focus
J Laudon
ACM SIGARCH Computer Architecture News 33 (4), 5-13, 2005
752005
High-memory capacity DIMM with data and state memory
JP Laudon, DE Lenoski, J Manton
US Patent 5,790,447, 1998
751998
Using windowed register file to checkpoint register state
JP Laudon, AR Talcott, S Patel, TS Suresh
US Patent App. 11/484,970, 2008
722008
System and method for controlling thread suspension in a multithreaded processor
K Aingaran, J Laudon
US Patent App. 11/095,840, 2006
632006
Apparatus and method for page migration in a non-uniform memory access (NUMA) system
JP Laudon, DE Lenoski
US Patent 5,727,150, 1998
581998
Design of scalable shared-memory multiprocessors: The DASH approach
D Lenoski, K Gharachorloo, J Laudon, A Gupta, J Hennessy, M Horowitz, ...
Digest of Papers Compcon Spring'90. Thirty-Fifth IEEE Computer Society …, 1990
561990
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