Sumeet Gupta
Sumeet Gupta
School of Electrical and Computer Engineering, Purdue University
Verified email at purdue.edu
Title
Cited by
Cited by
Year
A steep-slope transistor based on abrupt electronic phase transition
N Shukla, AV Thathachary, A Agrawal, H Paik, A Aziz, DG Schlom, ...
Nature communications 6 (1), 1-6, 2015
1902015
KNACK: A hybrid spin-charge mixed-mode simulator for evaluating different genres of spin-transfer torque MRAM bit-cells
X Fong, SK Gupta, NN Mojumder, SH Choday, C Augustine, K Roy
2011 International Conference on Simulation of Semiconductor Processes and …, 2011
1362011
A three-terminal dual-pillar STT-MRAM for high-performance robust memory applications
NN Mojumder, SK Gupta, SH Choday, DE Nikonov, K Roy
IEEE transactions on electron devices 58 (5), 1508-1516, 2011
1152011
Asymmetric drain spacer extension (ADSE) FinFETs for low-power and robust SRAMs
A Goel, SK Gupta, K Roy
IEEE Transactions on Electron Devices 58 (2), 296-308, 2010
1052010
Future cache design using STT MRAMs for improved energy efficiency: Devices, circuits and architecture
SP Park, S Gupta, N Mojumder, A Raghunathan, K Roy
Proceedings of the 49th Annual Design Automation Conference, 492-497, 2012
1002012
Physics-based circuit-compatible SPICE model for ferroelectric transistors
A Aziz, S Ghosh, S Datta, SK Gupta
IEEE Electron Device Letters 37 (6), 805-808, 2016
892016
The design and hardware implementation of a low-power real-time seizure detection algorithm
S Raghunathan, SK Gupta, MP Ward, RM Worth, K Roy, PP Irazoqui
Journal of neural engineering 6 (5), 056005, 2009
832009
Digital computation in subthreshold region for ultralow-power operation: A device–circuit–architecture codesign perspective
SK Gupta, A Raychowdhury, K Roy
Proceedings of the IEEE 98 (2), 160-190, 2010
812010
Write-optimized reliable design of STT MRAM
Y Kim, SK Gupta, SP Park, G Panagopoulos, K Roy
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
752012
Asymmetrically doped FinFETs for low-power robust SRAMs
F Moradi, SK Gupta, G Panagopoulos, DT Wisland, H Mahmoodi, K Roy
IEEE transactions on electron devices 58 (12), 4241-4249, 2011
752011
Layout-aware optimization of STT MRAMs
SK Gupta, SP Park, NN Mojumder, K Roy
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012
682012
Nonvolatile memory design based on ferroelectric FETs
S George, K Ma, A Aziz, X Li, A Khan, S Salahuddin, MF Chang, S Datta, ...
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
592016
High-performance low-energy STT MRAM based on balanced write scheme
D Lee, SK Gupta, K Roy
Proceedings of the 2012 ACM/IEEE international symposium on Low power …, 2012
532012
Impact of total and partial dipole switching on the switching slope of gate-last negative capacitance FETs with ferroelectric hafnium zirconium oxide gate stack
P Sharma, K Tapily, AK Saha, J Zhang, A Shaughnessy, A Aziz, ...
2017 Symposium on VLSI Technology, T154-T155, 2017
442017
Enabling energy-efficient nonvolatile computing with negative capacitance FET
X Li, J Sampson, A Khan, K Ma, S George, A Aziz, SK Gupta, ...
IEEE Transactions on Electron Devices 64 (8), 3452-3458, 2017
432017
Ferroelectric transistor model based on self-consistent solution of 2D Poisson's, non-equilibrium Green's function and multi-domain Landau Khalatnikov equations
AK Saha, P Sharma, I Dabo, S Datta, SK Gupta
2017 IEEE International Electron Devices Meeting (IEDM), 13.5. 1-13.5. 4, 2017
422017
Device-circuit analysis of ferroelectric FETs for low-power logic
S Gupta, M Steiner, A Aziz, V Narayanan, S Datta, SK Gupta
IEEE Transactions on Electron Devices 64 (8), 3092-3100, 2017
392017
Exploiting ferroelectric FETs for low-power non-volatile logic-in-memory circuits
X Yin, A Aziz, J Nahas, S Datta, S Gupta, M Niemier, XS Hu
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016
392016
Computing with ferroelectric FETs: Devices, models, systems, and applications
A Aziz, ET Breyer, A Chen, X Chen, S Datta, SK Gupta, M Hoffmann, ...
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
372018
“Negative capacitance” in resistor-ferroelectric and ferroelectric-dielectric networks: Apparent or intrinsic?
AK Saha, S Datta, SK Gupta
Journal of Applied Physics 123 (10), 105102, 2018
372018
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Articles 1–20