Joseph S. Friedman
Joseph S. Friedman
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Low-Energy Truly Random Number Generation with Superparamagnetic Tunnel Junctions for Unconventional Computing
D Vodenicarevic, N Locatelli, A Mizrahi, JS Friedman, AF Vincent, ...
Physical Review Applied 8 (5), 054045, 2017
A spin-diode logic family
JS Friedman, N Rangaraju, YI Ismail, BW Wessels
IEEE Transactions on Nanotechnology 11 (5), 1026-1032, 2012
Bayesian Inference with Muller C-Elements
JS Friedman, LE Calvet, P Bessière, J Droulez, D Querlioz
IEEE Transactions on Circuits & Systems I, 2016
Cascaded spintronic logic with low-dimensional carbon
JS Friedman, A Girdhar, RM Gelfand, G Memik, H Mohseni, A Taflove, ...
Nature communications 8 (1), 1-7, 2017
Spintronic devices as key elements for energy-efficient neuroinspired architectures
N Locatelli, AF Vincent, A Mizrahi, JS Friedman, D Vodenicarevic, JV Kim, ...
2015 Design, Automation & Test in Europe Conference & Exhibition (DATE), 994-999, 2015
Complementary Magnetic Tunnel Junction Logic
JS Friedman, AV Sahakian
Electron Devices, IEEE Transactions on 61 (4), 1207-1210, 2014
Emitter-coupled spin-transistor logic
JS Friedman, JA Peters, G Memik, BW Wessels, AV Sahakian
Journal of Parallel and Distributed Computing 74 (6), 2461-2469, 2014
Emitter-Coupled Spin-Transistor Logic
JS Friedman, YI Ismail, G Memik, AV Sahakian, BW Wessels
International Symposium on Nanoscale Architectures (NANOARCH), 139-145, 2012
Magnetic domain wall neuron with lateral inhibition
N Hassan, X Hu, L Jiang-Wei, WH Brigner, OG Akinola, F Garcia-Sanchez, ...
Journal of Applied Physics 124 (15), 152127, 2018
Threshold Logic With Electrostatically Formed Nanowires
JS Friedman, A Godkin, A Henning, Y Vaknin, Y Rosenwaks, ...
IEEE Transactions on Electron Devices, 2016
Emitter-Coupled Spin-Transistor Logic: Cascaded Spintronic Computing Beyond 10 GHz
JS Friedman, BW Wessels, G Memik, AV Sahakian
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 5 (1 …, 2015
InMnAs magnetoresistive spin-diode logic
JS Friedman, N Rangaraju, YI Ismail, BW Wessels
Proceedings of the great lakes symposium on VLSI, 209-214, 2012
Graded-Anisotropy-Induced Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron
WH Brigner, X Hu, N Hassan, CH Bennett, JAC Incorvia, ...
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits 5 …, 2019
Approximation enhancement for stochastic Bayesian inference
JS Friedman, J Droulez, P Bessière, J Lobo, D Querlioz
International Journal of Approximate Reasoning 85, 139-158, 2017
Spin diode network synthesis using functional composition
MGA Martins, FS Marranghello, JS Friedman, AV Sahakian, RP Ribas, ...
2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI), 1-6, 2013
Bilayer avalanche spin-diode logic
JS Friedman, ER Fadel, BW Wessels, D Querlioz, AV Sahakian
AIP Advances 5 (11), 117102, 2015
Shape-Based Magnetic Domain Wall Drift for an Artificial Spintronic Leaky Integrate-and-Fire Neuron
WH Brigner, N Hassan, L Jiang-Wei, X Hu, D Saha, CH Bennett, ...
IEEE Transactions on Electron Devices 66 (11), 4970-4975, 2019
Overhead requirements for stateful memristor logic
X Hu, MJ Schultis, M Kramer, A Bagla, A Shetty, JS Friedman
IEEE Transactions on Circuits and Systems I: Regular Papers 66 (1), 263-273, 2018
Magnetoresistance implications for complementary magnetic tunnel junction logic (CMAT)
JS Friedman, D Querlioz, AV Sahakian
Proceedings of the 2015 IEEE/ACM International Symposium on Nanoscale …, 2015
System and method for threshold logic with electrostatically formed nanowire transistors
JS Friedman, AV Sahakian, A Godkin, A Henning, Y Rosenwaks
US Patent App. 10/002,964, 2018
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